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(Based on text: David A. Patterson

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Title: (Based on text: David A. Patterson


1
COMPUTER ARCHITECTURE
Introduction
  • (Based on text David A. Patterson John L.
    Hennessy, Computer Organization and Design The
    Hardware/Software Interface, 3rd Ed., Morgan
    Kaufmann, 2007)

2
COURSE CONTENTS
  • Introduction
  • Instructions
  • Computer Arithmetic
  • Performance
  • Processor Datapath
  • Processor Control
  • Pipelining Techniques
  • Memory
  • Input/Output Devices

3
INTRODUCTION
  • Overview the Computer Systems
  • Evolution of Memory and Processor
  • Historical Perspective
  • Levels of Representation

4
A Desktop Computer
  • A desktop computer (left figure)
  • Motherboard, I/O interface board, board for
    memory chips, power supply, disk drives (right
    figure)

5
Inside a PC
Patterson Henessey, Morgan Kaufmann 2007
6
PC Motherboard
  • Intel Pentium 4 processor - upper left, covered
    by metal fins (heat sink)
  • Main memory DRAM middle, small board
    perpendicular to mother board (DIMMs)
  • The rest mostly connectors for external I/O
    devices

7
Processor Chip - 1
  • Earlier Intel Pentium Chip

8
Processor Chip - 2
  • Intel Pentium 4

Intel Pentium 4 die photo (Henessey
Patterson, Morgan Kaufmann 2003)
Intel Pentium 4 with 3 GHz - package (intel 2003)
9
Processor Chip - 3
  • Intel Pentium 4

10
Hardware / Software
  • Hardware physical components
  • System software operating system, compiler,
    ....
  • Application software PowerPoint, spreadsheet,
    ...

11
Five Classic Components of a Computer Network
  • Datapath performs arithmetic logic operation
  • Control tells datapath, memory, I/O what to do
    according to instructions
  • Memory stores programs datacache (SRAM)
    small fastDRAM main memoryoptical disk (CD,
    DVD), magnetic disk, FLASH, magnetic tapes
    secondary, nonvolatile
  • Input inputs instructions, data, etc. e.g.
    keyboard, mouse (electromech ? optical), disk...
  • Output outputs results, information, etc. e.g.
    monitor (flat-panel LCDs or CRT), printer, disk,
  • Network communicates with other computers,
    resource sharing, non-local accesses e.g. LAN,
    Internet, ...

Network
12
A Historical Perspective
  • 1946 J. Presper Eckert John Mauchly (U. Penn.)
    announced ENIAC (Electronic Numerical Integrator
    and Calculator). It used vacuum tubes and
    performed 1900 adds/sec
  • John von Neumann joined Eckert Mauchly and
    built EDVAC (Electronic Discrete Variable
    Automatic Computer), a stored-program computer
  • 1948 U. Manchester built Mark-I, first
    operational, stored-program computer
  • 1949 Maurice Wilkes (Camb. U.) built EDSAC
    (Electronic Delay Storage Automatic Calculator),
    first full-scale, operational, stored-program
    computer
  • 1940s Other pioneers include Konrad Zuse
    (Germany), Alan Turing (UK)
  • 1940s Howard Aiken (Harvard) built Mark-III
    Mark-IV, with separate memories for instructions
    data, hence Harvard Architecture
  • 1947 Whirlwind started at MIT, using magnetic
    core memory
  • 1951 1st successful commercial computer, UNIVAC
    I (Universal Automatic Computer), built and sold
    (Remington-Rand / Eckert-Mauchly Computer Corp.)
  • 1952 IBM shipped IBM 701

13
A Historical Perspective
  • 1964 IBM Syst/360. IBM/360 architectures
    dominated large computer market
  • 1965 DEC unveiled PDP-8, 1st commercial
    minicomputer
  • 1971 Intel invented 1st microprocessor, Intel
    4004
  • 1963 Seymour Cray at CDC announced CDC 6600, 1st
    supercomputer
  • 1976 Cray announced Cray-I, then fastest
    supercomputer
  • No single fountainhead for personal computer
  • 1977 Apple II by Steve Jobs Steve Wozniak set
    stds for low cost high volume
  • 1981 IBM announced IBM PC and became the
    best-selling computer of any kind its success
    gave Intel the most popular microprocessor and
    Microsoft the most popular operating system
  • 1990s Multimedia, networks, Internet, embedded
    processors, graphics, etc.
  • 2000 - Wireless mobile (e.g. cell phone), 3-D
    graphics, multimedia (e.g. video), Internet, GHz
    processors, embedded, dual-core, quad-core,
    multi-core, etc.
  • 90s, 2000 - Architectural techniques
    Superscalar, dynamic pipelining, speculative
    execution, VLIW, multithreading, multi-core arch,
    etc.

14
Intel 80x86 History
  • 1978 Intel announced 8086 16-bit architecture
    (an extension to 8080 8-bit)
  • 1980 Intel announced 8087 floating point
    co-processor
  • 1982 Intel announced 80286, with address-space
    extended to 24 bits
  • 1985 Intel announced 80386, a 32-bit
    architecture
  • 1989 Intel 80486, with improved performance,
    pipelining
  • 1992 Intel Pentium, improved performance
  • 1995 Intel Pentium Pro, improved performance (gt
    100 MHz)
  • 1997 MMX extension, set of instructions to
    accelerate multimedia communication
    applications
  • 1998 Intel Pentium II
  • 1999 Intel Pentium III
  • 2000 Intel Pentium III gt 1 GHz, competition from
    AMD, Pentium IV (11/00)
  • 2002 Intel Pentium IV gt 3 GHz (3.06 GHz) with
    multithreading and 0.13 micron technology
  • 2005 Intel Pentium D (dual-core version of
    Pentium 4 Extreme) - 2 independent execution
    units onto same processor
  • 2006-07 Intel Quad-Core, 65 nm technology

15
Technology Trends - 1
16
Technology Trends - 2
  • Moores law transistor capacity doubles every
    18-24 months

17
Multithreading Multi-core CPUs
  • Threads (threads of execution) - a program forks
    itself into 2 or more simultaneously (or
    pseudo-simultaneously) running tasks
  • Multiple threads can be executed in parallel on
    many computers
  • Single processor - by time slicing when a single
    processor switches between different threads, so
    fast as to give the illusion of simultaneity
  • Multiprocessor or multi-core system - achieved
    via multiprocessing, different threads
    processes run simultaneously on different
    processors or cores.
  • Multi-core CPUs
  • Multi-chip approach - cores are made by different
    chips that are put together in a single package.
    Cores communicate using front side bus. L2 cache
    is separated
  • Monolithic approach - Cores are manufactured in
    only one chip, do not need to use front side bus.
    Memory cache is shared between the two cores.
    Better performance

18
Levels of Representation
  • temp vkvk vk1vk1 temp
  • lw 15, 0(2)lw 16, 4(2)sw 16, 0(2)sw
    15, 4(2)
  • 00000000101000010000000000011000

High level language program
Compiler
Assembly language program
Object Library routine (machine lang.)
Memory
19
SUMMARY
  • Overview the computer systems
  • Five classic components of a computer
  • Evolution of memory and processor
  • Computer technology trends
  • Levels of representation
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