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Quick Tour of Logic Synthesis

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Title: Quick Tour of Logic Synthesis


1
Quick Tour of Logic Synthesis
  • A Design Example

2
Outline
  • Simple Case Conversion Circuit
  • First Refinement
  • The Transform Block
  • The Command Interpreter
  • Technology Mapping

3
The LUNC Circuit
LUNC Lower case, Upper case, No change, or
Change case case conversion circuit
Case conversion Circuit
4
LUNC Interface
  • Input 8-bit ASCII code of an
  • alphanumeric character
  • Output Case conversion of the input character
  • L gt convert to Lower case
  • U gt convert to Upper case
  • N gt No conversion
  • C gt Change case

5
LUNC Specification
Input string a b C d E f U a
b C D Output string ? ? a b C
d E f ? ? A B C D
L gt convert to Lower case U
gt convert to Upper case N gt No
conversion C gt Change case
? gt dont care
Latency 2
6
ASCII Codes and operation of change
Hex
Note Only change is in bit 5, so Code(a)
Code(A) 32
7
LUNC Block Diagram
8
Transform Block
Behavioral Description of combinational logic
Procedure TRANSFORM (Rin,Lcmd,Ucmd,Ncmd,Ccmd)
if (Lcmd) mux
TOLOWER(Rin) else if
(Ucmd)
mux TOUPPER(Rin)
else if(Ncmd)
mux Rin

else if(Ccmd)
mux CHANGECASE(Rin) return(mux)



9
Transform Block
  • Remarks
  • A relatively high level description is easy to
    read and write
  • Calling the output MUX suggests that we can
    translate the IF-THEN-ELSE statement into a
    multiplexer

10
Transform Block Diagram
lower
upper
Simple translation
Change case
11
Transform Block Diagram
  • This implementation is clearly correct, but
    inelegant, since LC, UC, CC done every cycle
  • Synthesis tool reduces the chip area from 606
    literals to 12 literals, if the dont care
    conditions are specified
  • Then we show that a clever, but not so
    obviously correct, design can implement this
    function in 12 literals directly.

12
The ChangeCase Block
Procedure CHANGECASE(Rin) if
(isUC(Rin)) res Rin 32
else res Rin - 32
return (res)
Rin
isUC
/ 8
res
/-
32
/ 8
13
The Optimized Transform Block
0-00 gt 0 (UC) 1-00 gt Rin5 0-10 gt Rin5 0-01 gt
1 (LC)
Out
Modulo the 1-hot dont cares, script.rugged
gets Out NcmdRin5LCcmdRin5, costing 5
lts (7 feedthrough buffer lits makes 12)
Note Ucmd is implicit 0-00 gt Ucmd1
14
The Command Interpreter
Decoder If previous character is
escape, and if Current input character is L,U,N,
or C, then the outputs Lcmd, Ucmd,Ncmd, and
Ccmd are reset. Else they are Dont Cares
Register
Latches
Decoder
15
The Command Interpreter
Procedure lunc? (Rin) if(Rin L) Lcmd1,
UcmdNcmdCcmd0 else if (Rin U) Ucmd1,
LcmdNcmdCcmd0
else if (Rin N) Ncmd1, LcmdUcmdCcmd0
else if
(Rin C) Ccmd1, LcmdUcmdCcmd0
else LcmdUcmdNcmdCcmdD
on'tCare return (Lcmd, Ucmd, Ncmd, Ccmd)
16
Comparison For Equality
AB
A
7
B
7
Aescape0x1b27
A
7
A
0
A
0
B
0
17
Distinguishing L,U,N,C
L 0x4C 01001100 74 U 0x55 01010101
85 N 0x4E 01001110 78 C 0x43
01000011 67
The last2 bits are sufficient for distinguishing
L,U,N,C
Everything else is dont care
Note isC not needed because of the One Hot
assumption
18
Optimized Command Interpreter
in7,,in1,in0
MUXs choose between current isL, isN, isC and
previous state
isESC
isL
oL
Delay of 1
isN
oN
1 gt
isC
oC
19
LUNC
x7 x0
o7 o0
i7 i0
b5
reg8
x5
reg8
x7,x1,x0
Lcmd
Ncmd
Ccmd
CI
20
Final LUNC
E 0 1 0 0 0 1 0 1
Clock Tick t7, 8, 9, 10, 11 input
I, U, a, b, C
b5
7 8 9 10 11
f01100110,
TB
x51,
b51,
7,8, 9,10,11
isESC0,
Lcmd
0,
Ncmd
Ccmd
LUNC Simulation
CI
21
Technology Mapping
  • Synthesis
  • Translation
  • Optimization
  • Technology mapping
  • Technology dependent
  • Technology independent

22
Quick Tour of Logic Synthesis
  • Sungho Kang
  • Yonsei University
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