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A Remote FPGA Laboratory Environment

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A Remote FPGA Laboratory Environment By David Hehir Supervisor: Dr. Fearghal Morgan Co-Supervisor: Prof. Gear id Laighn Final Year Project Presentation – PowerPoint PPT presentation

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Title: A Remote FPGA Laboratory Environment


1
A Remote FPGA Laboratory Environment
  • By David Hehir
  • Supervisor Dr. Fearghal Morgan
  • Co-Supervisor Prof. Gearóid Ó Laighn
  • Final Year Project Presentation

2
Contents
  • Initial Aims
  • Introduction
  • Hardware
  • VHDL
  • Graphical User Interface
  • Future Work
  • Summary

3
Initial Aims
  • Enable use of board LEDs and Displays through
    VHDL
  • Enable these switches/buttons Virtually
  • Establish a communications link for the Lab
  • Create a GUI to implement
  • Implement the Virtual design
  • Develop a real-time
  • Virtual Laboratory for students

4
Introduction
  1. Local PC/User PC will be given details of Lab
    Computer IP/Password
  2. User will download the template VHDL file
    containing the necessary files. Can now
    edit/compile locally on Local PC.
  3. By logging on through a Virtual Networking Client
    (VNC) the user will have control
  4. The webcam will relay the image of the FPGA back
    to the user.

5
Enabling Board LEDs/Switches
  • The following graphic shows how the LEDs and
    Seven-Segment Displays on the Spartan 3 Starter
    Board are assigned in the physical scenario.
  • The four spring-loaded push buttons will be
    connected to the LEDs shown
  • The switches will be loading the seven-segment
    displays with a HEX value (0 to F)
  • Digits are assigned the names digit3, digit2,
    digit1, digit0 in that respective order

6
Webcam
  • Logitech Quickcam Plug-and-Play chosen for
    ease of setup
  • Live Video Capture video at a size
  • Manual Focus Adjust for the sharpest picture.

7
Original AppliedVHDL By Fearghal Morgan
8
VHDL Overview
9
(No Transcript)
10
Template (using Xilinx)
11
User Code Skeleton.vhd
  • The skeleton is the main user design part of the
    template. It connects the buttons and switches to
    the Digit Displays and the LEDs
  • All the other functions such as the UART and
    display Controller will stay the same(although
    will be open to editing also)
  • The user can open the Skeleton.vhd file.
  • From the skeleton they can also change with
    LEDs and which Digit displays they would like to
    use.
  • The user can now add their own code to, e.g.
    create a binary counter, change the sequence in
    which the LEDs light, add their own design
    essentially.

12
Generate/Upload Bitstream File
  • User will compile and generate bitstream(.bit)
    file
  • Upload code to Host
  • Send to board (iMPACT)
  • Code will be viewable running

13
Graphical User Interface
  • The Original AppliedVHDL GUI was designed by
    previous students including Martin OHalloran.
  • The functionality of it includes
  • CSR Read/Write
  • RAM Read/Write
  • Digital Image Processing

14
Graphical User Interface
  • Original GUI
  • Modified GUI

15
Graphical User Interface
  • The additional controls were added by Visual
    Basic
  • The Virtual Controls must be enabled first
  • LEDs have GUI buttons assigned to them
  • Data can be displayed by inputting HEX or Binary
    values and submitting to board
  • Controls can then again be disabled

16
Connection to the Host PC?
17
UltraVNC
  • Modified and updated version of VNC
  • Freeware
  • Open-Source
  • File transfer supported
  • Chat functionality
  • Admin security
  • Viewer/Server
  • Easy to use

18
Laboratory Interface
  • The laboratory screen will contain
  • AppliedVHDL GUI
  • iMPACT
  • Webcam view

19
Future Work
  • Considering what additional GUI controls may be
    useful to a user.
  • Considering what additional FPGA elements may be
    useful in a user library.
  • Extending the system for use with the NEXYS
    Spartan-3 development system, its GUI and USB
    interface.
  • Developing a new memory controller within the
    appliedVHDL system to allow operation on the
    NEXYS system.
  • Editing source of UltraVNC to further project
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