Lecture 12 PicoBlaze Overview

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Lecture 12PicoBlaze Overview
ECE 448 FPGA and ASIC Design with VHDL
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Required reading

• P. Chu, FPGA Prototyping by VHDL Examples
• Chapter 14, PicoBlaze Overview

Recommended reading
PicoBlaze 8-bit Embedded Microcontroller User
Guide for Spartan-3, Virtex-II, and Virtex-II Pro
FPGAs (search for it using Google or Xilinx
website documentation search)
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Block diagram of a Single-Purpose Processor (FSMD
Finite State Machine with Datapath)
ctrl
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Block diagram of a General-Purpose Processor
(Microcontroller)
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PicoBlaze
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PicoBlaze Overview
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Register File of PicoBlaze
2
3
4
5
6
7
sf
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Definition of Flags
Flags are set or reset after ALU operations
Zero flag - Z
zero condition
Z 1 if result 0 0
otherwise
overflow, underflow, or various conditions
Example C 1 if result gt 28-1 or
result lt 0
0 otherwise Applies only to addition or
subtraction related instructions, refer to
following slides otherwise
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Interface of PicoBlaze
KCPSM constant (K) coded programmable state
machine
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Interface of PicoBlaze
Name Direction Size Function
clk input 1 System clock signal.
reset input 1 Reset signal.
address output 10 Address of the instruction memory. Specifies address of the instruction to be retrieved.
instruction input 18 Fetched instruction.
port_id output 8 Address of the input or output port.
in_port input 8 Input data from I/O peripherals.
read_strobe output 1 Strobe associated with the input operation.
out_port output 8 Output data to I/O peripherals.
write_strobe output 1 Strobe associated with the output operation.
interrupt input 1 Interrupt request from I/O peripherals.
interrupt_ack output 1 Interrupt acknowledgment to I/O peripherals
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Development Flow of a System with PicoBlaze
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PicoBlaze Programming Model
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Syntax and Terminology
Syntax Example Definition
sX KK PORT(KK) PORT((sX)) RAM(KK)
s7 ab PORT(2) PORT((sa)) RAM(4)
Value at register 7 Value ab (in hex) Input value
from port 2 Input value from port specified by
register a Value from RAM location 4
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Addressing modes
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PicoBlaze ALU Instruction Set Summary (1)
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PicoBlaze ALU Instruction Set Summary (2)
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PicoBlaze ALU Instruction Set Summary (3)
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Logic instructions
C Z

• AND
• AND sX, sY
• sX and sY gt sX
• AND sX, KK
• sX and KK gt sX
• 2. OR
• OR sX, sY
• sX or sY gt sX
• OR sX, KK
• sX or KK gt sX
• 3. XOR
• XOR sX, sY
• sX xor sY gt sX
• XOR sX, KK
• sX xor KK gt sX

0
IMM, DIR
0
IMM, DIR
IMM, DIR
0
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Arithmetic Instructions (1)
C Z
IMM, DIR
Addition ADD sX, sY sX sY gt sX ADD sX,
KK sX KK gt sX ADDCY sX, sY sX
sY CARRY gt sX ADDCY sX, KK sX KK
CARRY gt sX
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Arithmetic Instructions (2)
C Z
IMM, DIR
Subtraction SUB sX, sY sX sY gt sX SUB
sX, KK sX KK gt sX SUBCY sX, sY
sX sY CARRY gt sX SUBCY sX, KK
sX KK CARRY gt sX
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Test and Compare Instructions
C Z
TEST TEST sX, sY sX and sY gt none
TEST sX, KK sX and KK gt none COMPARE
COMPARE sX, sY sX sY gt none
COMPARE sX, KK sX KK gt none
IMM, DIR
C odd parity of the result
IMM, DIR
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Data Movement Instructions (1)
C Z
- -
LOAD LOAD sX, sY sY gt sX LOAD
sX, KK KK gt sX
IMM, DIR
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Data Movement Instructions (2)
C Z
- -
DIR, IND
STORE STORE sX, KK sX gt RAM(KK)
STORE sX, (sY) sX gt RAM((sY))
- -
FETCH FETCH sX, KK RAM(KK) gt sX FETCH
sX, (sY) RAM((sY)) gt sX
DIR, IND
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Example 1 Clear Data RAM

routine clr_data_mem function
clear data ram temp register data,
s2
clr_data_mem load s2, 40
unitize loop index to 64 load s0,
00 clr_mem_loop store s0, (s2) sub s2, 01
dec loop index jump nz,
clr_mem_loop repeat until s20 return
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Data Movement Instructions (3)
C Z
- -
DIR, IND
INPUT INPUT sX, KK sX lt PORT(KK)
INPUT sX, (sY) sX lt PORT((sY)) OUTPUT
OUTPUT sX, KK PORT(KK) lt sX OUTPUT sX,
(sY) PORT((sY)) lt sX
- -
DIR, IND
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Edit instructions - Shifts
All shift instructions affect Zero and Carry
flags
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Edit instructions - Rotations
All rotate instructions affect Zero and Carry
flags
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Program Flow Control Instructions (1)
JUMP AAA PC lt AAA JUMP C, AAA
if C1 then PC lt AAA else PC lt PC
1 JUMP NC, AAA if C0 then PC lt
AAA else PC lt PC 1 JUMP Z, AAA if
Z1 then PC lt AAA else PC lt PC 1 JUMP NZ,
AAA if Z0 then PC lt AAA else PC
lt PC 1
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Program Flow Control Instructions (2)
CALL AAA TOS lt TOS1 STACKTOS lt
PC PC lt AAA CALL C Z , AAA if C
Z 1 then TOS lt TOS1
STACKTOS lt PC PC lt AAA else
PC lt PC 1 CALL NC NZ , AAA
if C Z 0 then TOS lt TOS1
STACKTOS lt PC PC lt AAA else
PC lt PC 1
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Program Flow Control Instructions (3)
RETURN PC lt STACKTOS 1 TOS lt
TOS - 1 RETURN C Z if C Z 1
then PC lt STACKTOS 1 TOS
lt TOS - 1 else PC lt PC
1 RETURN NC NZ if C Z 0 then
PC lt STACKTOS 1 TOS lt TOS
- 1 else PC lt PC 1
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Subroutine Call Flow
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Interrupt Related Instructions
RETURNI ENABLE PC lt STACKTOS TOS
lt TOS 1 I lt 1 Clt PRESERVED C
Zlt PRESERVED Z RETURNI DISABLE PC
lt STACKTOS TOS lt TOS 1 I lt 0
Clt PRESERVED C Zlt PRESERVED Z ENABLE
INTERRUPT I lt1 DISABLE INTERRUPT
I lt0
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Interrupt Flow
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PicoBlaze Development Environments
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KCPSM3 Assembler Files
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Directives of Assembly Language
Equating symbolic name for an I/O port ID.
keyboard DSIN 0E switch DSIN 0F LED DSOUT 15
N/A
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Differences between Mnemonics of Instructions
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Differences between Mnemonics of Instructions
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Differences between Programs
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Example ofa function in the PicoBlazeassembly
language
ECE 448 FPGA and ASIC Design with VHDL
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Notation
a Multiplicand ak-1ak-2 . . . a1 a0 x
Multiplier xk-1xk-2 . . . x1 x0 p
Product (a ? x) p2k-1p2k-2 . . . p2 p1 p0
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Multiplication of two 4-bit unsigned binary
numbers
Partial Product 0
Partial Product 1
Partial Product 2
Partial Product 3
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Unsigned Multiplication Basic Equations
k-1
x ? xi ? 2i
p a ? x
i0
k-1
p a ? x ? a ? xi ? 2i x0a20 x1a21
x2a22 xk-1a2k-1
i0
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Iterative Algorithm for Unsigned
Multiplication Shift/Add Algorithm
p a ? x x0a20 x1a21 x2a22 xk-1a2k-1


(...((0 x0a2k)/2 x1a2k)/2 ...
xk-1a2k)/2
k times
p(0) 0
j0..k-1
p(j1) (p(j) xj a 2k) / 2
p p(k)
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Iterative Algorithm for Unsigned
Multiplication Shift/Add Algorithm
p a ? x x0a20 x1a21 x2a22 x7a27

(...((0 x0a28)/2 x1a28)/2 ... x7a28)/2

8 times
p(0) 0
j0..7
p(j1) (p(j) xj a 28) / 2
p p(k)
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Unsigned Multiplication Computations
8 bits
8 bits
pH
pL
p
p(j)
xj a
xj a 28

pL
pH
C
2 p(j1)
gtgt 1
p(j1)
pL
pH
C
pH s5
pL s6
PicoBlaze Registers
a s3 x s4
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Unsigned Multiplication Subroutine (1)

routine mult_soft function 8-bit
unsigned multiplier using
shift-and-add algorithm input register
s3 multiplicand s4 multiplier output
register s5 upper byte of product
s6 lower byte of product temporary register
s2 index j

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Unsigned Multiplication Subroutine (2)
mult_soft load s5, 00 clear
pH load s2, 08 initialize loop
index mult_loop sr0 s4
shift lsb of x to carry jump nc, shift_prod
x_j is 0 add s5, s3
x_j is 1, pHpHa shift_prod sra s5
shift upper byte pH right,
carry to MSB, LSB to
carry sra s6 shift lower
byte pL right,
lsb of pH to MSB of pL sub s2, 01
dec loop index jump nz, mult_loop
repeat until i0 return
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Edit instructions - Shifts
All shift instructions affect Zero and Carry
flags