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Hall D Trigger and Data Rates

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Hall D Trigger and Data Rates Elliott Wolin Hall D Electronics Review Jefferson Lab 23-Jul-2003 Outline Rates from Design Report Comparison with LHC,CLAS – PowerPoint PPT presentation

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Title: Hall D Trigger and Data Rates


1
Hall D Trigger and Data Rates
  • Elliott Wolin
  • Hall D Electronics Review
  • Jefferson Lab
  • 23-Jul-2003

2
Outline
  1. Rates from Design Report
  2. Comparison with LHC,CLAS
  3. Additional Considerations
  4. DAQ Challenges

3
1. Rates from Design Report
  • High trigger rate 200 KHz
  • Deadtimeless, pipelined front ends
  • Small event size 5 KB
  • Small Level 1 rejection rate factor of 2
  • Modest rate off detector 1 GB/sec
  • Modest Level 3 rejection factor of 10
  • Modest cpu needed in Level 3 0.1 SPECint
  • High rate to tape 100 MB/sec

4
1. Rates, cont
5
2. Comparison with LHC, CLAS
  • Compared to LHC, Hall D has
  • Similar (LHCb, BTev) or higher trigger rate
  • Much smaller events
  • Much smaller rate off detector
  • Much smaller total trigger rejection
  • Similar rate to tape
  • Less cpu/evt needed in Level 3

6
2. Comparison with LHC, CLAS
  • Compared to CLAS, Hall D has
  • Much higher trigger rate
  • 200 KHz vs 3 KHz
  • Same size events
  • Approximately the same number channels
  • Much higher rate off detector
  • 1 GB/s vs 25 MB/s
  • Factor 10 Level 3 rejection
  • CLAS has no Level 3
  • Factor 4 higher rate to tape
  • 100 MB/s vs 25 MB/s

7
Hall D
KTeV
KTev
CLAS
8
Atlas
BTev
Hall D
CMS
KTev, CDF, DO, BaBar, CLAS
9
3. Additional Considerations
  • Can not interrupt ROC every event (200 KHz)
  • Event blocking in front end cpus
  • Timing and trigger distribution
  • Note that CLAS has
  • 25 crates
  • 1 Trigger supervisor
  • 1 Event Builder and 1 Event Recorder
  • No Level 3 farm

10
Hall D DAQ Baseline Architecture
50-100 front-end crates
Gigabit switch 200 KHz
8 event builders
4 Gigabit switches
200 Level 3 Filter Nodes
4 event recorders
Network connection to silo 20 KHz
4 tape drives
11
3. Additional Considerations, cont
  • Crates vs networked front end boards?
  • If crates used, VME vs CPCI vs ?
  • (RT)Linux vs VXWorks in front end cpus?
  • Need low-latency interrupt in front end cpus?
  • Location of electronics, crates?
  • Grounding design?

12
4. DAQ Challenges
  • All problems solved somewhere, many in CLAS
  • But new to JLab/CODA
  • Timing distribution
  • Event blocking
  • Many more front end crates
  • Multiple event builders/recorders
  • Large Level 3 farm
  • Multiple, simultaneous DAQ systems (for
    commissioning)
  • Need for fault tolerance
  • Integration with control system
  • How are we going to do it?
  • See next talk

13
Backup slides
14
3. Comparison, cont
Event Size L1 Input Rate L1 output Rate L2 output Rate L3 output Rate
KTev 8 KB 100 KHz 800 MB/s 20 KHz 160 MB/s 2 KHz 7 MB/s
CDF 270 KB 50 KHz 13 GB/s 300Hz 80 MB/s 80 Hz 23 MB/s
D0 250 KB 10 KHz 2.5 GB/s 1 KHz 250 MB/s 70 Hz 13 MB/s
BaBar 33 KB (1200 L1) 2 KHz 2.4 GB/s None (65 MB/s) 100 Hz 4 MB/s
BTev 50-80 KB 800 GB/s 80 KHz 8 GB/s 4 KHz 200 MB/s
15
3. Comparison, cont
Event Size L1 Input Rate L1 output Rate L2 output Rate L3 output Rate
Atlas 1-2 MB 75 KHz 100 GB/s 3 KHz 5 GB/s 200 Hz 300 MB/s
CMS 1 MB 100 KHz 100 GB/s 100 Hz 100 MB/s
CLAS 6 KB 4 KHz 4KHz 25 MB/s 4KHz 25 MB/s
Hall D 5 KB 400 KHz 200 KHz 1 GB/s none 20 KHz 100 MB/s
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