Departement Elektriese, Elektroniese

1
Reducing jitter utilising adaptive FIR
pre-emphasis for high speed serial links
Marius Goosen Saurabh Sinha Microelectronics
Electronics GroupUniversity of Pretoria, South
Africa Wednesday, 04 December 2013
Departement Elektriese, Elektroniese
Rekenaar-Ingenieurswese Department of Electrical,
Electronic Computer Engineering Kgoro ya Merero
ya Mohlagase, Elektroniki Bointšinere bja
Khomphutha
2
Background

• M-data lines combined into a high speed serial
  data line
• Less skew between lines
• Higher bandwidth capability
• Lower pin count and cost of implementation

Departement Elektriese, Elektroniese
Rekenaar-Ingenieurswese Department of Electrical,
Electronic Computer Engineering Kgoro ya Merero
ya Mohlagase, Elektroniki Bointšinere bja
Khomphutha
3
High speed serial links
Reference Data rate Technology Pre-emphasis
1 1 Gb/s CMOS None
2 5 Gb/s CMOS 3-tap
3 10 Gb/s CMOS 5-tap
4 10 Gb/s BiCMOS None

• 1 C.Y. Yang and Y. Lee, A 0.18 µm CMOS 1 Gb/s
  serial link transceiver by using PWM and PAM
  techniques, IEEE International Symp. on Circuits
  and systems, Vol. 2, pp. 1150-1153, Kobe, 23-26
  May 2005.
• 2 C.H. Lin, C.H. Wang and S.J. Jou, 5 Gbps
  serial link transmitter with pre-emphasis, IEEE
  Proc. of the 2003 Asia South Pacific design
  automation conf., Kitakyushu, pp. 795-800, 21-24
  Jan. 2003.
• 3 M. Li, T. Kwasniewski, S. Wang and Y. Tao, A
  10 Gb/s transmitter with multi-tap FIR
  pre-emphasis in 0.18µm CMOS technology, IEEE
  Proc. of the 2005 Asia South Pacific design
  automation conf., Shanghai, pp 679-682, 18-21
  Jan. 2005.
• 4 D.J. Friedman, M. Meghelli, B.D. Parker, J.
  Yang, H.A Ainspan, A.V. Rylyakov, Y.H. Kwark,
  M.B. Ritter, L. Shan, S.J. Zier, M. Soma and M.
  Soyuer, SiGe BiCMOS integrated circuits for high
  speed serial communication links, IBM J. Res.
  Dev., Vol 47, No 2/3, Mar. 2003.

Departement Elektriese, Elektroniese
Rekenaar-Ingenieurswese Department of Electrical,
Electronic Computer Engineering Kgoro ya Merero
ya Mohlagase, Elektroniki Bointšinere bja
Khomphutha
4
Frequency dependant distortion Package parasitics

• Introduces frequency dependant devices

Departement Elektriese, Elektroniese
Rekenaar-Ingenieurswese Department of Electrical,
Electronic Computer Engineering Kgoro ya Merero
ya Mohlagase, Elektroniki Bointšinere bja
Khomphutha
5
Frequency dependant distortion Copper backplane
channel
Departement Elektriese, Elektroniese
Rekenaar-Ingenieurswese Department of Electrical,
Electronic Computer Engineering Kgoro ya Merero
ya Mohlagase, Elektroniki Bointšinere bja
Khomphutha
6
Frequency dependant distortion Channel response

• Loss of 50 dB _at_ 10 GHz
• Severe frequency dependent distortion

Departement Elektriese, Elektroniese
Rekenaar-Ingenieurswese Department of Electrical,
Electronic Computer Engineering Kgoro ya Merero
ya Mohlagase, Elektroniki Bointšinere bja
Khomphutha
7
Frequency dependant distortion Impulse response

• Long tail interferes with adjacent bits
• Reduced amplitude

Departement Elektriese, Elektroniese
Rekenaar-Ingenieurswese Department of Electrical,
Electronic Computer Engineering Kgoro ya Merero
ya Mohlagase, Elektroniki Bointšinere bja
Khomphutha
8
Deterministic jitter

• Deterministic jitter
• Duty cycle distortion
• Data dependent jitter
• DDJ caused by this frequency dependent distortion
• DDJ causes uncertainty in pulse edges

Unit interval
Ideal sampling instant
Error region
Departement Elektriese, Elektroniese
Rekenaar-Ingenieurswese Department of Electrical,
Electronic Computer Engineering Kgoro ya Merero
ya Mohlagase, Elektroniki Bointšinere bja
Khomphutha
9
Adaptive pre-emphasis

• Conventional pre-emphasis
• Externally adjustably filter taps
• Fixed filter taps
• Adaptive pre-emphasis
• Automatically finds optimal filter taps
• Does not require a characterised channel

Requires characterised channel
Departement Elektriese, Elektroniese
Rekenaar-Ingenieurswese Department of Electrical,
Electronic Computer Engineering Kgoro ya Merero
ya Mohlagase, Elektroniki Bointšinere bja
Khomphutha
10
Pilot signaling and peak detection

• Training sequence together with tap value ensures
  that a maximum is achieved at the tap of interest

Departement Elektriese, Elektroniese
Rekenaar-Ingenieurswese Department of Electrical,
Electronic Computer Engineering Kgoro ya Merero
ya Mohlagase, Elektroniki Bointšinere bja
Khomphutha
11
Mathematical simulation results ?

• Before pre-emphasis Completely closed eye
  diagram!

Departement Elektriese, Elektroniese
Rekenaar-Ingenieurswese Department of Electrical,
Electronic Computer Engineering Kgoro ya Merero
ya Mohlagase, Elektroniki Bointšinere bja
Khomphutha
12
Mathematical simulation results ? ?
Departement Elektriese, Elektroniese
Rekenaar-Ingenieurswese Department of Electrical,
Electronic Computer Engineering Kgoro ya Merero
ya Mohlagase, Elektroniki Bointšinere bja
Khomphutha
13
Mathematical simulation results ? ? ?

• After pre-emphasis tap training Open eye
  diagram, minimal jitter.

Departement Elektriese, Elektroniese
Rekenaar-Ingenieurswese Department of Electrical,
Electronic Computer Engineering Kgoro ya Merero
ya Mohlagase, Elektroniki Bointšinere bja
Khomphutha
14
Mathematical simulation results ? ? ? ?
Departement Elektriese, Elektroniese
Rekenaar-Ingenieurswese Department of Electrical,
Electronic Computer Engineering Kgoro ya Merero
ya Mohlagase, Elektroniki Bointšinere bja
Khomphutha
15
Mathematical simulation results ? ? ? ? ?
30 ps
800 ps
10 ps
Departement Elektriese, Elektroniese
Rekenaar-Ingenieurswese Department of Electrical,
Electronic Computer Engineering Kgoro ya Merero
ya Mohlagase, Elektroniki Bointšinere bja
Khomphutha
16
Implemented system
Departement Elektriese, Elektroniese
Rekenaar-Ingenieurswese Department of Electrical,
Electronic Computer Engineering Kgoro ya Merero
ya Mohlagase, Elektroniki Bointšinere bja
Khomphutha
17
Circuit layouts ?
FIR filter taps
Pilot signal generator
Testability
Logic
Departement Elektriese, Elektroniese
Rekenaar-Ingenieurswese Department of Electrical,
Electronic Computer Engineering Kgoro ya Merero
ya Mohlagase, Elektroniki Bointšinere bja
Khomphutha
18
Circuit layouts ? ?
Amplifier comparator
Control pulse generation
Departement Elektriese, Elektroniese
Rekenaar-Ingenieurswese Department of Electrical,
Electronic Computer Engineering Kgoro ya Merero
ya Mohlagase, Elektroniki Bointšinere bja
Khomphutha
19
Circuit layouts ? ? ?
TX
RX
Departement Elektriese, Elektroniese
Rekenaar-Ingenieurswese Department of Electrical,
Electronic Computer Engineering Kgoro ya Merero
ya Mohlagase, Elektroniki Bointšinere bja
Khomphutha
20
Conclusion

• DDJ severely distorts the data at the receiver
• DDJ can be overcome with implementation of
  pre-emphasis
• Adaptive pre-emphasis alters for uncharacterised
  channels
• Pilot signaling and peak detection Simple yet
  effective
• Awaiting prototype IC sponsored by MOSIS
• 0.8 mm2
• 21 pins
• ETA March 2010

Departement Elektriese, Elektroniese
Rekenaar-Ingenieurswese Department of Electrical,
Electronic Computer Engineering Kgoro ya Merero
ya Mohlagase, Elektroniki Bointšinere bja
Khomphutha
21
Feedback/questions

• Marius Goosen
• Carl Emily Fuchs Institute for Microelectronics
• Dept. Electrical, Electronic Computer
  Engineering
• University of Pretoria
• Pretoria 0002
• SOUTH AFRICA
• Tel [phone]
• E-mail mgoosen_at_ieee.org

Acknowledgement The authors would like to thank
ARMSCOR, the Armaments Corporation of South
Africa Ltd, (Act 51 of 2003) for sponsoring this
research study.