Faster Logic Manipulation for Large Designs

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Faster Logic Manipulation for Large Designs

• Alan Mishchenko Robert Brayton
• UC Berkeley

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Logic Representations

• Truth tables
• Sum of products (SOP, CNF)
• Factored forms
• BDDs
• AIGs and TTs
• DSDs

(since 1854?) (since 1959) (since 1983) (since
1986) (since 2000) (since 2012)
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Pros and Cons of Logic Representations
Logic represen- tation Efficiency for small / large functions Canonicity Speed of computing Robustness Size of represen- tation Reveals Boolean properties
TT /-- yes yes -- -
SOP/CNF / no no/yes /
FF / no yes
BDD / yes no -
AIG / no yes -
DSD /- yes yes -
symmetry, unateness, NPN canonicity,
decomposability, etc
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Motivation for DSD Use
Equivalent AIG in ABC
AIG is a Boolean network of 2-input AND nodes and
invertors (dotted lines)
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One AIG Node Many Cuts
Combinational AIG

• Each AIG cut represents a different logic node
• AIG manipulation with cuts is equivalent to
  working on many Boolean networks simultaneously

f
4-input logic function
a
c
d
e
b
Different cuts for the same node
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Computing Logic Function of a Cut

• SOP
• BDD
• TT
• TTs are better than BDDs in terms of memory and
  runtime
• However, both TTs and BDDs obscure Boolean
  properties
• DSD
• DSDs take less memory/runtime than BDDs/TTs for
  practical functions of K inputs (8 lt K lt 16)
• DSDs explicitly represent Boolean properties
• Symmetry, unateness, NPN canonicity,
  decomposition, etc
• Very important for practical applications!

S P E E D
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Logic Operations on Cut Functions

• AIG Rewriting
• Technology mapping with Boolean matching

16-input structure composed of three 6-LUTs
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DSD and 1-Step DSD

• DSD
• Represented as a tree whose leaves have disjoint
  support
• DSD is full if functions at nodes are only AND,
  XOR, MUX.
• Invertors are edge attributes.
• A node without DSD is prime.
• 1-step DSD
• There exists variable x such that both
  
  cofactors w.r.t. x are full DSDs

F(a,b,c,d,e,f,g) AND(a, MUX(b,!XOR(c,d,e),!AND(f
,g)))
()and, ltgtmux, xor, !not
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DSD Computation

• DSDs and 1-DSDs represent functions of the cuts
  in the AIG during mapping or rewriting
• At each node, find all K-cuts
• Each cut defines a function with at most K inputs
• Compute cuts DSD by composing DSDs of the fanin
  cuts
• Compute NPN canonical form and find it in (or add
  it to) the unique table in DSD manager
• Use computed table to reuse the results of
  intermediate Boolean operations (such as
  computing AND of two DSDs)
• How many cut functions are DSD or 1-DSD?

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DSD Prevalence in Benchmarks
Table 1A Percentages of unique functions, NPN
classes, and DSDs for different cut sizes
(industrial benchmarks).
of functions and classes of functions and classes of functions and classes of DSDs relative to NPN classes (DSDs / total n-input NPNs) 100 of DSDs relative to NPN classes (DSDs / total n-input NPNs) 100 of DSDs relative to NPN classes (DSDs / total n-input NPNs) 100 of DSDs relative to the number of cuts (DSDs / cuts) 100 of DSDs relative to the number of cuts (DSDs / cuts) 100 of DSDs relative to the number of cuts (DSDs / cuts) 100
Cut size Cuts Func NPN Full 1-step Total Full 1-step Total
6 30.0 M 0.88 0.04 6.15 64.32 70.47 93.16 6.24 99.40
8 33.6 M 2.25 0.24 10.91 58.42 69.33 86.28 11.07 97.35
10 35.0 M 3.09 0.59 17.40 49.96 67.36 80.78 14.22 95.00
12 35.6 M 3.73 0.97 21.03 42.08 63.11 75.06 16.87 91.93
14 35.9 M 4.20 1.26 22.02 36.86 58.88 71.06 17.71 88.77
Table 1B Percentages of unique functions, NPN
classes, and DSDs for different cut sizes (public
benchmarks).
of functions and classes of functions and classes of functions and classes of DSDs relative to NPN classes (DSDs / total n-input NPNs) 100 of DSDs relative to NPN classes (DSDs / total n-input NPNs) 100 of DSDs relative to NPN classes (DSDs / total n-input NPNs) 100 of DSDs relative to the number of cuts (DSDs / cuts) 100 of DSDs relative to the number of cuts (DSDs / cuts) 100 of DSDs relative to the number of cuts (DSDs / cuts) 100
Cut size Cuts Func NPN Full 1-step Total Full 1-step Total
6 19.8 M 1.68 0.07 4.74 58.38 63.12 89.72 9.32 99.04
8 21.1 M 4.66 0.56 8.27 47.22 55.49 78.48 16.36 94.84
10 21.3 M 6.71 1.46 11.57 37.79 49.37 69.96 19.60 89.56
12 21.7 M 7.92 2.23 12.55 32.69 45.24 63.51 20.93 84.44
14 22.0 M 8.89 2.92 11.99 28.40 40.39 60.36 19.25 79.61
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DSD Package

• Similar to BDD package
• Maintains canonical forms
• Performs Boolean operations
• Employs computed table
• Different from BDD package
• Uses different data structure
• Used different normalization rules
• Limited to small practical functions (6-16
  inputs)
• The computed table is more reusable

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Primitives of DSD Manager

• One constant 0 node
• One primary input node n
• Multi-input AND nodes with ordered fanins
• Multi-input XOR nodes with ordered fanins
• Three-input MUX nodes
• Multi-input PRIME nodes (w/o DSD with 1-step
  DSD)
• Multi-input PRIME nodes (w/o DSD w/o 1-step DSD)

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Usefulness of DSDs

• Constructed on-the-fly during cut enumeration
• No BDDs
• No TTs
• Start from elementary variables
• Derive resulting DSDs by ANDing fanin DSDs
• Canonicized
• Unique table (only stores NPN classes of Boolean
  functions)
• Cached
• Computed table
• If available, the result is returned (e.g. LUT
  structures matching)
• If not available, the result is computed and
  stored

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Rules for Canonizing a DSD

• Collapsing similar functions
• AND((a,b), AND(c,AND(d,e))) AND(a,b,c,d,e)
• Propagating complements to inputs or output
• AND(!a, !AND(!b, c)) ? AND(a, !AND(b, c))
• AND(!a, !XOR(b, c)) ? AND(a, XOR(b, c))
• AND(a, MUX(b,!AND(c,d),!AND(e,f))) ?
  AND(a,!MUX(b,AND(c,d),AND(e,f)))
• Using a single variable
• AND(MUX(d, e, f), a, XOR(b, c)) ? AND(n, XOR(n,
  n), MUX(n, n, n))
• F (a?b)c and G d(e?f) ?
  AND(n, XOR(n, n)) - same NPN class
• (Arbitrary but fixed) ordering rules, applied in
  the increasing order
• The node fanins are ordered by their support size
• If tie, AND precedes XOR precedes MUX precedes
  PRIME
• If tie, a non-complemented fanin precedes
  a complemented fanin
• If tie, fanins fanins are ordered and compared
  in their selected order
• If recursive comparison of fanin subtrees fails
  to produce a unique order, the fanins DSDs are
  isomorphic and their order is immaterial

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Example of Canonicizing a DSD
F(a,b,c,d,e,f,g) OR( a, !MUX( b, !XOR(c,!e,d),
!AND(f,g) ) )
()
!a
ltgt
b
PN !abfgced
()and, ltgtmux, xor, !not
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Examples of Full DSDs
2 inputs 3 inputs 4 inputs 5 inputs 6 inputs
(ab) (abc) (abcd) (abcde) (abcdef)
ab (a!(bc)) (a!(b!(cd))) (a(bc)(de)) (ab(cd)(ef))
abc abcd (a!(!(bc)!(de)) (!(abc)!(def))
a(bc) (ab(cd)) (altb(cd)egt) altbcdefgt
(abc) (altbcdgt) lta(bc)(de)gt lta(bc)ltdefgtgt
ltabcgt ltabcdgt ltaltbc!(de)gtgt lt(ab!(cd))efgt
(ab) denotes AND(a,b) ab denotes
XOR(a,b) ltabcgt denotes MUX(a, b, c) ab !ac
First two columns contain all canonical forms
using this basis
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Case Study LUT structure mapping
16-input structure composed of three 6-LUTs

• Comparing run times
• with truth tables (TTs)
• with DSDs
• Application selected because
• LUT structure mapping mitigates structural bias
  of AIG and improves the quality of regular
  LUT-mapping
• useful for new generations of programmable
  devices
• mapping requires heavy Boolean manipulation
• implementation in ABC using TTs is prohibitively
  slow for large designs

• Preliminary Results (DSDs vs. TTs)
• Boolean matching
• on average 30X faster
• Total runtime of mapping
• on average 7X faster

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References

• Canonical form
• R. L. Ashenhurst, The decomposition of switching
  functions. Computation Lab, Harvard University,
  1959, Vol. 29, pp. 74-116.
• Computation from cofactors
• V. Bertacco and M. Damiani, "Disjunctive
  decomposition of logic functions," Proc. ICCAD
  97, pp. 78-82.
• Computation from cofactors (corrections)
• Y. Matsunaga, "An exact and efficient algorithm
  for disjunctive decomposition", Proc. SASIMI '98,
  pp. 44-50.
• Alternative computations
• T. Sasao and M. Matsuura, "DECOMPOS An
  integrated system for functional decomposition,"
  Proc. IWLS 98, pp. 471-477.
• S.-I. Minato and G. De Micheli, Finding all
  simple disjunctive decompositions using
  irredundant sum-of-products forms. Proc.
  ICCAD98, pp. 111-117.
• Boolean operations
• S. Plaza and V. Bertacco, "Boolean operations on
  decomposed functions", Proc. IWLS 05.
• Applications in synthesis and mapping
• A. Mishchenko, R. K. Brayton, and S. Chatterjee,
  "Boolean factoring and decomposition of logic
  networks", Proc. ICCAD'08, pp. 38-44.

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Conclusion

• DSDs are an interesting representation
• Effective only for small, practical functions!
• DSDs reveal Boolean properties and facilitate
• Rewriting
• Technology mapping
• Factoring
• DSDs lead to larger scope (cut depth) than TTs
• Most operations are local but repeated often
• Memory usage and runtime are improved due to
• Canonicity (unique table in the DSD manager)
• Result caching (computed table in the DSD manager)

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The End
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Truth Tables

• Pros
• Can be fast
• Can be constructed using bit parallel operations
• Canonical given variable ordering
• Support fast operations on them
• predictable
• Cons
• Good for only small functions
• Does not reveal any function properties

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Factored Forms

• Pros
• Support medium fast operations on them
• Algorithms support minimization and many
  operations
• Reveals some function properties
• Cons
• Need to go through SOP construction
• Good for only small to medium sized functions
• Unpredictable
• Not canonical

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BDDs

• Pros
• Support fast operations on them
• Canonical given variable order
• Algorithms support many operations
• Good for some large functions
• Cons
• Unpredictable
• Does not reveal function properties

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AIGs

• Pros
• Extremely fast
• Good for large functions
• Predictable
• Support many fast operations on them
• Cons
• Not canonical
• Does not reveal function properties

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DSDs

• Disjoint support decompositions

• Pros
• Very fast for small functions
• Support some fast operations on them
• Canonical given consistent ordering rules
• Reveals many properties of function
• Predictable
• Cons
• Not good for functions with inputs n gt 20

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DSD - example

• Computing canonical form of FG where Fcd ef ,
  Gca!b, HFG (cd ef)(ca!b)
• Fcan!AND(!AND(n, n), !AND(n, n))
• GcanAND(n, n, n)
• PNs FPNcdef, GPNca!b
• H F ? G ca!b(d ef)
• HcanAND(n, n, n, !AND(n, !AND(n, n)))
• HPN(c,a,!b,d,e,f)

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DSD - Example

• Computing canonical form of FG where Fef cd,
  Gca!b, Hca!bd ca!bef.
• Fcan!AND(!AND(n, n), !AND(n, n))
• GcanAND(n, n, n)
• HcanAND(n, n, n, !AND(n, !AND(n, n)))
• PNs FPNcdef, GPNa!bc, HPNa!bcdef
• Can cache canonical form of H (ef cd) ? (ca!b)

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Experimental Results
Runtime comparison for 16-input LUT structure
mapping with TTs (left) and DSDs (right).
Name PI PO AND Match (TT), sec Total (TT), sec Match (DSD), sec Total (DSD), sec
i10 257 224 2675 9.44 14.13 0.21 2.41
pj1 1769 1063 16285 54.37 82.69 2.19 11.52
aqua 1941 4805 25058 122.23 169.67 4.05 22.85
Geo mean 1.000 1.000 0.031 0.147