Convolutional Code Based Concurrent Error Detection in Finite State Machines

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Convolutional Code Based Concurrent Error
Detection in Finite State Machines
Konstantinos N. Rokas Advisor Prof. Yiorgos
Makris
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Finite State Machine Model
Automaton View
S2
In1
In0
S1
S3
S5
S4
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Concurrent Error Detection

• Objective
• Obtain an Indication of the Operational Health of
  the Circuit during Normal Functionality

FSM Circuit Normal Functionality
outputs
inputs
Concurrent Error Detection Functionality

• What Can go Wrong?
• Permanent Faults
• Intermittent Faults
• Transient Faults

Concurrent Error Detection Output
Why do we care? Circuit Reliability
Dependability
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Non-Intrusive CED Minimize Delay
Basic Principle Leave Original FSM
Intact (Controller Circuits Highly Optimized for
Speed)
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Unrestricted Error Model

• Assumption
• Malfunctions May Transform a Transition into Any
  Other Transition

S2
In1
In0
S1
S3

• Implication (Meyer 67)
• Any Concurrent Error Detection for the
  Unrestricted Model will be as Complex as
  Duplication

S5
S4
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Restricted Error Model

• Assumption
• Hardware Malfunction Model Pinpoints Set of
  Erroneous Transitions

• Stuck-at Fault Model
• Every Line in the Circuit may be Stuck
  Permanently at Logic 1 or Logic 0
• Standard Industry Model, Acceptable but not Exact
• Any Model May be Used

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Convolutional Code-Based Solution
Input
State
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Convolutional Code-How it works
Key6
Key1
Key1
S1
S2
S3
S2
Transition matrix
U2
Codeword 1-gt1-gt6 is a valid codeword (occurs when
input to code is B-gtC-gtD-gtC)
A B C D
A
Codeword 1-gt1-gt1 is an invalid codeword Fault
will be detected with latency 1!
B
U1
C
PROBLEM How do we assign keys?
D
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Working through an example
An FSM with 8 states has the following next state
logic
Need to consider a restricted Error
model. Consider the stuck-at fault model.
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Graph of Faulty transitions
GM
S2
S1
S2
S3
If
then
S3
BM
Next step Identify coloring so that connected
states have different colors.
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From colors to keywords
Previous State
Input
Transition matrix
A
U2
A B C D
B
Next State
A
C
B
Previous Color
Next Color
U1
C
D
D
Key output
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Table of Keys for previous Example
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Observations on the H-K method
Flexibility in selecting the partition and the
code
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Example with limited key logic
A
Clever selection of code
Clever selection of a coloring
A B C D
B
000
001
011
A
B
C
110
010
C
D
D
111
101
100
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Example with limited key logic
Notice that K1NS1!
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Mathematical Formulation
The problem of having a next state bit equal to a
output key can be solved as a mixed linear
integer program. It is not guaranteed that we can
always find a solution. More details on the
mathematical formulation are provided in the
final report.
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Limitation Faults on output logic
Faults on the output will not be detected!
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Detecting output faults- Solution A
IDEA Share some of the output logic when making
key
Perhaps we could have one key bit equal the
output bit (just like we did with the next state
bit before!)
Then an incorrect Output will give us
an Incorrect key and the Error may be
detected! (and we will save h/w)
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Detecting output faults- Solution A
Graph of faulty transitions
000
001
011
110
010
111
101
100
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Table of Keys
Notice that OUTK0! Detects 58 of output errors.
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Detecting output faults- Solution B
Previous method had less than 100 efficiency
IDEA Treat the FSMs output as a state bit. All
output faults will be detected, since all state
faults are detected
Lets work through the previous example
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Detecting output faults- Solution B
Fault set
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Table
100 of faults will be detected!
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Conclusion

• Overview
• We have limited the hardware overhead for the key
  logic
• Using the same methodology we can detect output
  faults
• Alternatively, output faults can be detected by
  treating output bits like state bits

Future work Possible expansion for codes with
latency greater than one (this could minimize
further the number of key output bits)