PX7510 Training

1
PX7510 Training
2
Features (1)

• 150 KHz to 2.1 MHz Switching
• Resistor-based address, voltage, frequency and
  current limit set
• DCR current sense (0 to 3.6V)
• Digital temperature compensation
• Digital control loop
• Voltage control loop with feedforward gain
  compensation
• 4X Oversampling
• Adjustable droop control
• Current sharing
• Soft-start into prebiased load

3
Features (2)

• Soft-start step size1.56mV/step
• Sync up to four controllers in multiphase
  operation
• Use internal or external frequency reference
• PMBus serial interface
• V, I, T, faults report
• Voltage set and adjustment
• Tracking, sequencing and margining
• Override hardwired settings
• Protection Features
• Output OV/UV, Input UV OV
• OCP, Thermal shutdown
• Single 5V supply
• 32-pin QFN Package

4
PX7510 Block Diagram

• Inputs
• Differential Vsense (2)
• Differential Isense (2)
• Single ended Temp Sense (1)
• V12sen (1)
• SMbus
• 2-pin bus (2)
• Tri-state address (1)
• OutEn (1)
• Fset (1) (also Sync_phase)
• Vset (1) (also Vscale)
• Reset_n (1)
• Imaxset (1)
• Vtrim (1)
• Vbg_ext (1)
• Sync_in (1)
• Smb_alert_n (1)
• Ish_gnd (1)
• Outputs

5
Pinout

• 32-pin QFN
• 5mm x 5mm
• Pin compatible with future 2-phase version

6
Freq Sync Phase Spread

• Digital control loop to provides phase
  synchronization capability
• Power Islands can have independent output
  voltages but optimal phase spacing and
  synchronization
• Minimize input ripple and input cap

7
PMBus Control Capability

• Turn-on/off Sequencing
• Programmable turn on/off delay
• Vin on and Vin off settings
• Tracking
• Programmable soft-start ramp rate
• Margining
• Output Voltage
• Fine trim (1.6mV LSB)
• Coarse set (12.5mV LSB, 8-bits)
• Vout Max
• Vout Droop (loadline), 10-bits
• Sense scale factor (Vout/Vsense)
• Override Hardwired Settings
• Manage NVM
• Download parameters from NVM
• Upload parameters to NVM

• Max duty cycle
• Switching frequency
• Fault Levels
• OOVP, OUVP (fixed)
• OCP
• Overtemp
• IOVP, IUVP
• Fault Response
• Programmable Continue, Hiccup or Latched
  Shutdown (maskable)
• SMBAlert (maskable)
• Clear Faults
• Control Pin Override
• MFR extended commands
• Loop compensation

8
PMBus Reporting Capability

• Telemetry (Reads)
• Vin
• Vout
• Iout
• Temperature
• Duty Cycle
• Frequency
• PMBus Rev
• MFR ID, Model, Rev, Location
• MFR Date Serial (ASCII or binary supported)

• Fault Status
• Output voltage
• UV OV
• Output current
• Overcurrent
• Input voltage
• UV OV
• Temperature
• Fault Warning levels
• Communication
• Protocol violations
• Parameter range check
• MFR defined

9
PIN Set Detail

• Six Pin Sets for wide range of POL
  personalization
• FSET - Sets switching frequency and sync
  functionality
• 100kHz to 1.7MHz range
• Select master/slave for freq sync, phase 0, 90,
  180, 270
• VSET- Sets output voltage
• 0.4V to 3.6V range, resolution based on scale
  factor, typical 50mV
• Internal resolution is 12.5mV
• VTRIM - Trims Output Voltage
• 6.25mV resolution, - 50mV range
• Internal resolution is 1.56mV, -50mV range
• IMAXSET - Sets current limit, instantaneous OCP,
  and filtered OCP per phase
• 60A range, 4A resolution
• Internal range is 127Amps, 0.5A resolution
• SADDR - Sets I2C address
• 16 unique addresses supported

10
Current Sense
Rb
Cb
Rsense
This value should be 15mV35mV
11
Vin Sense
Vin
R1 is 63.4K,1
R2 is 10K,1
R1
R1 is 1000pF
V12sense
R2
C1
12
Temperature sense
Temperature sense
2.87k Ohm 1
1N4148ws
13
Voltage Sense
VSENN PX7510 VSENP
Divider Resister
Divider resister ? R58 R49 1 8 Voltage rang
is 0.451.8V
Divider resister ? R58 R49 1 1 Voltage rang
is 0.93.6V
14
Trim Procedure (Trim Vref)

1. Setting as below in the test page
2. Measure Voltage between Fault1 to GND, this
   is GND voltage
3. Setting as below in the test page
4. Measure Voltage between Fault1 to GND, this
   is DAC voltage.
5. Trim the VrefCal until DAC-GND is 1.8724V

15
Trim Procedure (Trim Vref TC)

1. Read register address 0x119
2. Calculate Round(0.127 reg 119(D7D0)
   20)/-4.883) and put it back to register address
   0x119(D15D8)

16
Trim Procedure (Trim XV current)

1. Write 0x0083 to Register address 0x106.
2. Write 0xa600 to Register address 0x126.
3. Measure current from SADDR to GND
4. Trim XV current (register 0x126 bit6bit0) to
   150uA

17
Trim Procedure (Trim Clk_lo)

1. Setting as below in the test page
2. Measure the frequency at the Fault1.
3. Trim the Lo trim until Frequency is 39.775MHz

18
Trim procedure (Trim Vout)

1. Power on the EV board
2. Measure output voltage
3. Trim Vout-cal until output voltage is equal
   output setting.

19
Trim Procedure (Trim Internal Temperature Reading)

1. Read Internal TEMP
2. Trim int_temp_correct until internal reading is
   25degC.

20
OCP
21
Output Voltage protection
22
Input Voltage protection
23
OTP
24
Current Sharing
Slave
Master
25
Current Sharing
26
Resister Setting - SADDR
27
Resister Setting - Frequency
28
Resister Setting - Imax
29
Resister Setting - Vset
30
Resister Setting - Vtrim
31
Timing Sequence - Turn On
32
Timing Sequence - Turn Off