Using MVSIS for Language Equation Solving

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Using MVSIS for Language Equation Solving
290N The Unknown Component Problem Lecture 4
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Overview

• MVSIS
• Multi-valued networks
• MVSIS input formats
• Binary functions and networks (PLA, BLIF)
• Multi-valued functions and networks (BLIF-MV)
• FSMs and finite automata (three options)
• Using BLIF/BLIF-MV followed by stg_extract
• Using modified KISS2 format
• Using modified BLIF-MV format
• Demo

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MVSIS

• New logic synthesis system (2001-2004)
• A successor of SIS (1987-1992)
• More general algorithms, improved implementation
• Additional capabilities to work with multi-valued
  networks
• Optimization procedures using complete
  flexibility
• Minimization of multi-valued relations
• Windowing
• Additional capabilities to work with sequential
  objects
• Sequential circuits (sweeping, extracting
  sequential DCs, extracting STGs)
• FSMs and automata (language equation solving
  procedures)

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MVSIS

• Credits
• Robert Brayton, inspiration, guidance, ideas,
  testing,
• William Jiang, worked on early versions,
  developed fullsimp, club, cvr packages,
  supported the code
• Roland Jiang, worked on early versions, developed
  the encoding package
• Yinghua Li, worked on early versions, developed
  pair_decode package and code for asynchronous
  synthesis
• Donald Chai, worked on early versions, advice on
  programming, data structures, naming APIs
• Satrajit Chatterjee, contributed a layout-aware
  logic extraction package, advice on programming,
  data structures, supporting the code

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Multi-Valued Networks

• Multi-valued networks are more general, compared
  to binary
• A node may have more than two values
• A latch may have more than two values
• A node can be incompletely-specified
• A node can be non-deterministic

Completely-specified
Incompletely-specified
Non-deterministic
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MVSIS Input Formats

• Binary functions and networks
• PLA, BLIF
• Multi-valued functions and networks
• PLA-MV, BLIF-MV
• FSMs and finite automata
• (as networks) BLIF, BLIF-MV
• (as binary STGs) Modified KISS2
• (as MV STGs) Modified BLIF-MV (under construction)

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Cube Representation of a Function

• F ab cd
• Cube table for variable order (a,b,c,d)
• 11-- 1
• --01 1
• Cube table for variable order (a,c,b,d)
• 1-1- 1
• -0-1 1

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PLA Format

• .i ltnumber of inputsgt
• .o ltnumber of outputsgt
• .ilb ltlist of input namesgt
• .ob ltlist of output namesgt
• .p ltnumber of product termsgt
• ltcube representation of the functiongt
• .e

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Example of a PLA file

• .i 4
• .o 1
• .ilb a b c d
• .ob F
• .p 2
• 11-- 1
• --01 1
• .e

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BLIF Format

• .model ltyou name itgt
• .inputs ltlist of input namesgt
• .outputs ltlist of output namesgt
• .names ltlist of fanin namesgt ltnode_namegt
• ltPLA representation of the nodes functiongt
• .names ltlist of fanin namesgt ltnode_namegt
• ltPLA representation of the nodes functiongt
• .latch ltlatch_inputgt ltlatch_outputgt ltreset_valuegt
• .latch ltlatch_inputgt ltlatch_outputgt ltreset_valuegt
• .end

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Example of a BLIF file

• .model example
• .inputs x y
• .outputs z
• .names x y w
• 11 1
• .latch w z 0
• .end

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BLIF-MV Format

• Differences compared to BLIF
• .mv ltvar namegt ltnumber of valuesgt ltlist of value
  namesgt
• Gives the values of the MV variable (optional for
  binary variables)
• .default ltvaluegt
• Gives the default value of the MV node
• .reset ltlatch_outputgt
• Gives the reset value (function) of the latch.
• .table (synonym of .names)
• Changes to the MV table representation
• the literals are separated by spaces,
• multi-valued literal can be represented as a set
  of values, for example, (2,3,5) or as interval of
  values, for example, 3-5
• the constructs can be used to compactly
  specify multiplexers

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Example of a BLIF-MV file
BLIF
BLIF-MV

• .model example
• .inputs x y
• .outputs z
• .mv x 2
• .mv y 2
• .mv z 2
• .mv w 2
• .table x y w
• .default 0
• 1 1 1
• .latch w z
• .reset z
• 0
• .end

.model example .inputs x y .outputs z .names x y
w 11 1 .latch w z 0 .end
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Inputting Automata into MVSIS

• Read in BLIF/BLIF-MV network and extract its STG
  (command stg_extract)
• Use the modified KISS2 format
• Use the modified BLIF-MV format (under
  construction)

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Extracting STG from the network

• .model example
• .inputs x y
• .outputs z
• .names x y w
• 11 1
• .latch w z 0
• .end

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Modified KISS format

• .i ltnumber of inputsgt
• .o ltnumber of outputsgt (zero, for automata)
• .ilb ltlist of input namesgt
• .ob ltlist of output namesgt
• .p ltnumber of product termsgt
• .s ltnumber of statesgt
• .accepting ltlist of accepting statesgt
• ltcube cover of the conditiongt ltcur stategt ltnext
  stategt
• ltcube cover of the conditiongt ltcur stategt ltnext
  stategt
• .e

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Example of a KISS2 file

• .i 2
• .o 0
• .s 3
• .p 7
• .ilb i o
• .ob
• .accepting a b
• 11 a a
• 00 a b
• 10 a DC
• 01 a DC
• -1 b a
• -0 b DC
• -- DC DC
• .e

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Modified BLIF-MV format

• An automaton is represented as an MV network with
  two nodes and one latch
• The next-state node
• depends on the inputs and the current state
• can be non-deterministic if the automaton is
  non-deterministic
• The binary output node
• depends on the current state only
• produces output 1 iff the state is accepting
• The latch
• represents the relationship between the current
  state and the next state variables
• The only additional directive (.fsm)
• specifies what inputs of the automaton are
  inputs/outputs of the underlying FSM (if
  applicable)

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Example of a BLIF-MV file

• .model automaton
• .inputs i o
• .outputs ACCEPT
• .fsm i -gt o
• .mv CS, NS 3 a b DC
• .table cs ACCEPT
• .default 0
• (a,b) 1
• .table i o CS NS
• .default DC
• 1 1 a a
• 0 0 a b
• - 1 b a
• .latch NS CS
• .reset CS
• a
• .end

.i 2 .o 0 .s 3 .p 7 .ilb i o .ob .accepting a
b 11 a a 00 a b 10 a DC 01 a DC -1 b a -0
b DC -- DC DC .e