Title: The CPU in more detail
1The CPU in more detail
- Programs and data are stored in memory
- Memory usually refers to RAM, but we use the more
general term memory to also include the caches - The CPU executes program instructions and
processes data - The CPU performs the following
- Fetches instructions and data from memory
- Decodes and executes instructions
- Stores results back into memory (to be displayed
on the screen or stored onto disk or) - Goes to the next instruction (if there is one)
2CPU High-Level Layout
CPU
Instructions and data go from Mem to CPU
Memory(or memory hierarchy)
Registers
Data Bus
ControlUnit
Processed data (results) go from CPU to Mem
ALU
Memory contains data and instructions
CPU contains a control unit, the ALU, and
registers
3CPU a closer look
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
MMR 06 R1
00
MMR 07 R2
01
ADD R1 R2
02
03
PC Program Counter
R1 General Purpose Register 1
04
Data Bus
00
05
R2 General Purpose Register 2
IR Instruction Register
100
06
MMR M6 R1
200
07
AC Accumulator
08
- Instruction cycle execution of a single program
instruction by the CPU - Fetch control unit loads instruction from memory
location in PC into IR - Decode control unit interprets instruction
- Execute control unit executes instruction (tells
ALU what to do) - PC is incremented to next program instruction and
cycle repeats
4Example Instruction Set
- Instruction set basic set of operations the CPU
can perform
Op Code and Usage Operation
INP val mem Puts a number value (val) in a particular memory address (mem)
MAM mem Copy value in accumulator to memory address (mem)
MMR mem reg Copy value at memory address (mem) to register (reg)
MRA reg Copy value in register (reg) to accumulator
MAR reg Copy value in accumulator to register (reg)
ADD reg1 reg2 Add values in reg1 and reg2, put result in accumulator
SUB reg1 reg2 Subtract value in reg2 from reg1, put result in accumulator
MUL reg1 reg2 Multiply values in reg1 and reg2, put result in accumulator
DIV reg1 reg2 Divide value in reg1 by reg2, put result in accumulator
JMP mem Unconditional jump to the instruction in memory address (mem), PCmem-1
JPZ mem Jump to the instruction in memory address (mem) if accumulator value 0
JPN mem Jump to instruction in memory address (mem) if accumulator value is NOT 0
JPL mem Jump to instruction in memory address (mem) if accumulator value is lt 0
JPG mem Jump to instruction in memory address (mem) if accumulator value is gt 0
HLT Halts program execution, indicates end of a program
5Example Program Execution
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
MMR 06 R1
00
MMR 07 R2
01
ADD R1 R2
02
MAM 08
03
PC Program Counter
R1 General Purpose Register 1
HLT
04
Data Bus
00
05
R2 General Purpose Register 2
IR Instruction Register
100
06
200
07
AC Accumulator
08
- Lets start with a simple program that will add
two values in memory and store the result in
another location in memory.
6Example Program Execution
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
MMR 06 R1
00
MMR 07 R2
01
ADD R1 R2
02
MAM 08
03
PC Program Counter
R1 General Purpose Register 1
HLT
04
Data Bus
00
05
R2 General Purpose Register 2
IR Instruction Register
100
06
200
07
AC Accumulator
08
- Program begins by the operating system
- Loading the instructions and data into memory
- Setting the program counter to the starting
instruction (ex PC0) - The CPU is always performing the
Fetch-Decode-Execute cycle, so the program then
begins immediately
7Example Program Execution
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
MMR 06 R1
00
MMR 07 R2
01
ADD R1 R2
02
MAM 08
03
PC Program Counter
R1 General Purpose Register 1
HLT
04
Data Bus
00
05
R2 General Purpose Register 2
IR Instruction Register
100
06
MMR 06 R1
200
07
AC Accumulator
08
- First pass of Fetch-Decode-Execute instruction
cycle - Fetch instruction at memory location in PC (00)
is loaded into IR
8Example Program Execution
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
MMR 06 R1
00
MMR 07 R2
01
ADD R1 R2
02
MAM 08
03
PC Program Counter
R1 General Purpose Register 1
HLT
04
Data Bus
00
05
R2 General Purpose Register 2
IR Instruction Register
100
06
MMR 06 R1
200
07
AC Accumulator
Move memory value to register
08
- First pass of Fetch-Decode-Execute instruction
cycle - Fetch instruction at memory location in PC (00)
is loaded into IR - Decode control unit decodes the message
9Example Program Execution
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
MMR 06 R1
00
MMR 07 R2
01
ADD R1 R2
02
MAM 08
03
PC Program Counter
R1 General Purpose Register 1
HLT
04
Data Bus
00
100
05
R2 General Purpose Register 2
IR Instruction Register
100
06
MMR 06 R1
200
07
AC Accumulator
Move memory value to register
08
- First pass of Fetch-Decode-Execute instruction
cycle - Fetch instruction at memory location in PC (00)
is loaded into IR - Decode control unit decodes the message
- Execute control unit moves value in memory to a
register
10Example Program Execution
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
MMR 06 R1
00
MMR 07 R2
01
ADD R1 R2
02
MAM 08
03
PC Program Counter
R1 General Purpose Register 1
HLT
04
Data Bus
01
100
05
R2 General Purpose Register 2
IR Instruction Register
100
06
MMR 06 R1
200
07
AC Accumulator
08
- First pass of Fetch-Decode-Execute instruction
cycle - Fetch instruction at memory location in PC (00)
is loaded into IR - Decode control unit decodes the message
- Execute control unit moves value in memory to a
register - Increment program counter (PC) to next
instruction (PC01)
11Example Program Execution
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
MMR 06 R1
00
MMR 07 R2
01
ADD R1 R2
02
MAM 08
03
PC Program Counter
R1 General Purpose Register 1
HLT
04
Data Bus
01
100
05
R2 General Purpose Register 2
IR Instruction Register
100
06
MMR 07 R2
200
07
AC Accumulator
08
- 2nd instruction cycle
- Fetch instruction at memory location in PC (01)
is loaded into IR
12Example Program Execution
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
MMR 06 R1
00
MMR 07 R2
01
ADD R1 R2
02
MAM 08
03
PC Program Counter
R1 General Purpose Register 1
HLT
04
Data Bus
01
100
05
R2 General Purpose Register 2
IR Instruction Register
100
06
MMR 07 R2
200
07
AC Accumulator
Move memory value to register
08
- 2nd instruction cycle
- Fetch instruction at memory location in PC (01)
is loaded into IR - Decode control unit decodes the message
13Example Program Execution
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
MMR 06 R1
00
MMR 07 R2
01
ADD R1 R2
02
MAM 08
03
PC Program Counter
R1 General Purpose Register 1
HLT
04
Data Bus
01
100
05
R2 General Purpose Register 2
IR Instruction Register
100
06
200
MMR 07 R2
200
07
AC Accumulator
Move memory value to register
08
- 2nd instruction cycle
- Fetch instruction at memory location in PC (01)
is loaded into IR - Decode control unit decodes the message
- Execute control unit moves value in memory to a
register
14Example Program Execution
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
MMR 06 R1
00
MMR 07 R2
01
ADD R1 R2
02
MAM 08
03
PC Program Counter
R1 General Purpose Register 1
HLT
04
Data Bus
02
100
05
R2 General Purpose Register 2
IR Instruction Register
100
06
200
MMR 07 R2
200
07
AC Accumulator
08
- 2nd instruction cycle
- Fetch instruction at memory location in PC (01)
is loaded into IR - Decode control unit decodes the message
- Execute control unit moves value in memory to a
register - Increment program counter (PC) to next
instruction (PC02)
15Example Program Execution
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
MMR 06 R1
00
MMR 07 R2
01
ADD R1 R2
02
MAM 08
03
PC Program Counter
R1 General Purpose Register 1
HLT
04
Data Bus
02
100
05
R2 General Purpose Register 2
IR Instruction Register
100
06
200
ADD R1 R2
200
07
AC Accumulator
08
- 3rd instruction cycle
- Fetch
16Example Program Execution
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
MMR 06 R1
00
MMR 07 R2
01
ADD R1 R2
02
MAM 08
03
PC Program Counter
R1 General Purpose Register 1
HLT
04
Data Bus
02
100
05
R2 General Purpose Register 2
IR Instruction Register
100
06
200
ADD R1 R2
200
07
AC Accumulator
Add values in registers, store in accumulator
08
- 3rd instruction cycle
- Fetch
- Decode
17Example Program Execution
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
MMR 06 R1
00
MMR 07 R2
01
ADD R1 R2
02
MAM 08
03
PC Program Counter
R1 General Purpose Register 1
HLT
04
Data Bus
02
100
05
R2 General Purpose Register 2
IR Instruction Register
100
06
200
ADD R1 R2
200
07
AC Accumulator
Add values in registers, store in accumulator
08
300
- 3rd instruction cycle
- Fetch
- Decode
- Execute
18Example Program Execution
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
MMR 06 R1
00
MMR 07 R2
01
ADD R1 R2
02
MAM 08
03
PC Program Counter
R1 General Purpose Register 1
HLT
04
Data Bus
03
100
05
R2 General Purpose Register 2
IR Instruction Register
100
06
200
ADD R1 R2
200
07
AC Accumulator
08
300
- 3rd instruction cycle
- Fetch
- Decode
- Execute
- Increment PC
19Example Program Execution
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
MMR 06 R1
00
MMR 07 R2
01
ADD R1 R2
02
MAM 08
03
PC Program Counter
R1 General Purpose Register 1
HLT
04
Data Bus
03
100
05
R2 General Purpose Register 2
IR Instruction Register
100
06
200
MAM 08
200
07
AC Accumulator
08
300
- 4th instruction cycle
- Fetch
20Example Program Execution
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
MMR 06 R1
00
MMR 07 R2
01
ADD R1 R2
02
MAM 08
03
PC Program Counter
R1 General Purpose Register 1
HLT
04
Data Bus
03
100
05
R2 General Purpose Register 2
IR Instruction Register
100
06
200
MAM 08
200
07
AC Accumulator
Move value in accumulator to memory
08
300
- 4th instruction cycle
- Fetch
- Decode
21Example Program Execution
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
MMR 06 R1
00
MMR 07 R2
01
ADD R1 R2
02
MAM 08
03
PC Program Counter
R1 General Purpose Register 1
HLT
04
Data Bus
03
100
05
R2 General Purpose Register 2
IR Instruction Register
100
06
200
MAM 08
200
07
AC Accumulator
Move value in accumulator to memory
300
08
300
- 4th instruction cycle
- Fetch
- Decode
- Execute
22Example Program Execution
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
MMR 06 R1
00
MMR 07 R2
01
ADD R1 R2
02
MAM 08
03
PC Program Counter
R1 General Purpose Register 1
HLT
04
Data Bus
04
100
05
R2 General Purpose Register 2
IR Instruction Register
100
06
200
MAM 08
200
07
AC Accumulator
300
08
300
- 4th instruction cycle
- Fetch
- Decode
- Execute
- Increment PC
23Example Program Execution
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
MMR 06 R1
00
MMR 07 R2
01
ADD R1 R2
02
MAM 08
03
PC Program Counter
R1 General Purpose Register 1
HLT
04
Data Bus
04
100
05
R2 General Purpose Register 2
IR Instruction Register
100
06
200
HLT
200
07
AC Accumulator
300
08
300
- 5th instruction cycle
- Fetch
24Example Program Execution
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
MMR 06 R1
00
MMR 07 R2
01
ADD R1 R2
02
MAM 08
03
PC Program Counter
R1 General Purpose Register 1
HLT
04
Data Bus
04
100
05
R2 General Purpose Register 2
IR Instruction Register
100
06
200
HLT
200
07
AC Accumulator
End of the program!
300
08
300
- 5th instruction cycle
- Fetch
- Decode
25Example Program Execution
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
MMR 06 R1
00
MMR 07 R2
01
ADD R1 R2
02
MAM 08
03
PC Program Counter
R1 General Purpose Register 1
HLT
04
Data Bus
04
100
05
R2 General Purpose Register 2
IR Instruction Register
100
06
200
HLT
200
07
AC Accumulator
End of the program!
300
08
300
- 5th instruction cycle
- Fetch
- Decode
- Execute ask OS for new PC value (next program to
run)
26More Complex Example Loop
- Lets compute power of 2!
- Lets sketch the algorithm needed
- Use two variables X and Y(X will store our
powers and Y will store the multiplier 2) - Initialize X1, Y2
- Repeat the following operations X XY
- Will this work? Yes!
- Begin X1, Y2
- Loop1 XXY X2, Y2
- Loop2 XXY X4, Y2
- Loop2 XXY X8, Y2
- how do we make it stop? Worry about that later
27More Complex Example Loop
- Lets write the assembly program
- 00 Storage for starting X (1)
- 01 Storage for multiplier Y (2)
- 02 Storage for Result (powers of 2)
- 03 INP 1 00 // PUT VALUE 1 IN MEM00
- 04 INP 2 01 // PUT VALUE 2 IN MEM01
- 05 MMR 00 R1 // COPY MEM00 (1) TO REG1
- 06 MMR 01 R2 // COPY MEM01 (2) TO REG2
- 07 MUL R1 R2 // ACCUMULATOR REG1REG2
- 08 MAR R1 // COPY ACCUMULATOR TO REG1
- 09 MAM 02 // COPY ACCUMULATOR TO MEM02
- 10 JMP 07 // LOOP JUMP TO MEM07
MEM
DATA
PROGRAM
28More Complex Example Loop
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
00
01
02
INP 1 00
03
PC Program Counter
R1 General Purpose Register 1
INP 2 01
04
Data Bus
03
MMR 00 R1
05
R2 General Purpose Register 2
IR Instruction Register
MMR 01 R2
06
MUL R1 R2
07
AC Accumulator
MAR R1
08
MAM 02
09
JMP 07
10
- OS loads program into memory
- OS sets program counter, PC03
- Program execution begins!
29More Complex Example Loop
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
1
00
01
02
INP 1 00
03
PC Program Counter
R1 General Purpose Register 1
INP 2 01
04
Data Bus
04
MMR 00 R1
05
R2 General Purpose Register 2
IR Instruction Register
MMR 01 R2
06
INP 1 00
MUL R1 R2
07
AC Accumulator
Put value 1 into MEM00
MAR R1
08
MAM 02
09
JMP 07
10
- Fetch-Decode-Execute instruction cycle
- Fetch
- Decode
- Execute
- Increment PC
30More Complex Example Loop
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
1
00
2
01
02
INP 1 00
03
PC Program Counter
R1 General Purpose Register 1
INP 2 01
04
Data Bus
05
MMR 00 R1
05
R2 General Purpose Register 2
IR Instruction Register
MMR 01 R2
06
INP 2 01
MUL R1 R2
07
AC Accumulator
Put value 2 into MEM01
MAR R1
08
MAM 02
09
JMP 07
10
- Fetch-Decode-Execute instruction cycle
- Fetch
- Decode
- Execute
- Increment PC
31More Complex Example Loop
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
1
00
2
01
02
INP 1 00
03
PC Program Counter
R1 General Purpose Register 1
INP 2 01
04
Data Bus
06
1
MMR 00 R1
05
R2 General Purpose Register 2
IR Instruction Register
MMR 01 R2
06
MMR 00 R1
MUL R1 R2
07
AC Accumulator
Copy MEM00 to R1
MAR R1
08
MAM 02
09
JMP 07
10
- Fetch-Decode-Execute instruction cycle
- Fetch
- Decode
- Execute
- Increment PC
32More Complex Example Loop
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
1
00
2
01
02
INP 1 00
03
PC Program Counter
R1 General Purpose Register 1
INP 2 01
04
Data Bus
07
1
MMR 00 R1
05
R2 General Purpose Register 2
IR Instruction Register
MMR 01 R2
06
2
MMR 01 R2
MUL R1 R2
07
AC Accumulator
Copy MEM01 to R2
MAR R1
08
MAM 02
09
JMP 07
10
- Fetch-Decode-Execute instruction cycle
- Fetch
- Decode
- Execute
- Increment PC
33More Complex Example Loop
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
1
00
2
01
02
INP 1 00
03
PC Program Counter
R1 General Purpose Register 1
INP 2 01
04
Data Bus
08
1
MMR 00 R1
05
R2 General Purpose Register 2
IR Instruction Register
MMR 01 R2
06
2
MUL R1 R2
MUL R1 R2
07
AC Accumulator
AC R1R2
MAR R1
08
2
MAM 02
09
JMP 07
10
- Fetch-Decode-Execute instruction cycle
- Fetch
- Decode
- Execute
- Increment PC
34More Complex Example Loop
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
1
00
2
01
02
INP 1 00
03
PC Program Counter
R1 General Purpose Register 1
INP 2 01
04
Data Bus
09
2
MMR 00 R1
05
R2 General Purpose Register 2
IR Instruction Register
MMR 01 R2
06
2
MAR R1
MUL R1 R2
07
AC Accumulator
Copy AC to R1
MAR R1
08
2
MAM 02
09
JMP 07
10
- Fetch-Decode-Execute instruction cycle
- Fetch
- Decode
- Execute
- Increment PC
35More Complex Example Loop
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
1
00
2
01
2
02
INP 1 00
03
PC Program Counter
R1 General Purpose Register 1
INP 2 01
04
Data Bus
10
2
MMR 00 R1
05
R2 General Purpose Register 2
IR Instruction Register
MMR 01 R2
06
2
MAM 02
MUL R1 R2
07
AC Accumulator
Copy AC to MEM02
MAR R1
08
2
MAM 02
09
JMP 07
10
- Fetch-Decode-Execute instruction cycle
- Fetch
- Decode
- Execute
- Increment PC
36More Complex Example Loop
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
1
00
2
01
2
02
INP 1 00
03
PC Program Counter
R1 General Purpose Register 1
INP 2 01
04
Data Bus
07
2
MMR 00 R1
05
R2 General Purpose Register 2
IR Instruction Register
MMR 01 R2
06
2
JMP 07
MUL R1 R2
07
AC Accumulator
Jump to MEM07PC07
MAR R1
08
2
MAM 02
09
JMP 07
10
- Fetch-Decode-Execute instruction cycle
- Fetch
- Decode
- Execute
- Increment PC
37More Complex Example Loop
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
1
00
2
01
2
02
INP 1 00
03
PC Program Counter
R1 General Purpose Register 1
INP 2 01
04
Data Bus
08
2
MMR 00 R1
05
R2 General Purpose Register 2
IR Instruction Register
MMR 01 R2
06
2
MUL R1 R2
MUL R1 R2
07
AC Accumulator
AC R1R2
MAR R1
08
4
MAM 02
09
JMP 07
10
- Fetch-Decode-Execute instruction cycle
- Fetch
- Decode
- Execute
- Increment PC
38More Complex Example Loop
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
1
00
2
01
2
02
INP 1 00
03
PC Program Counter
R1 General Purpose Register 1
INP 2 01
04
Data Bus
09
4
MMR 00 R1
05
R2 General Purpose Register 2
IR Instruction Register
MMR 01 R2
06
2
MAR R1
MUL R1 R2
07
AC Accumulator
Copy AC to R1
MAR R1
08
4
MAM 02
09
JMP 07
10
- Fetch-Decode-Execute instruction cycle
- Fetch
- Decode
- Execute
- Increment PC
39More Complex Example Loop
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
1
00
2
01
4
02
INP 1 00
03
PC Program Counter
R1 General Purpose Register 1
INP 2 01
04
Data Bus
10
4
MMR 00 R1
05
R2 General Purpose Register 2
IR Instruction Register
MMR 01 R2
06
2
MAM 02
MUL R1 R2
07
AC Accumulator
Copy AC to MEM02
MAR R1
08
4
MAM 02
09
JMP 07
10
- Fetch-Decode-Execute instruction cycle
- Fetch
- Decode
- Execute
- Increment PC
40More Complex Example Loop
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
1
00
2
01
4
02
INP 1 00
03
PC Program Counter
R1 General Purpose Register 1
INP 2 01
04
Data Bus
07
4
MMR 00 R1
05
R2 General Purpose Register 2
IR Instruction Register
MMR 01 R2
06
2
JMP 07
MUL R1 R2
07
AC Accumulator
Jump to MEM07PC07
MAR R1
08
4
MAM 02
09
JMP 07
10
- Fetch-Decode-Execute instruction cycle
- Fetch
- Decode
- Execute
- Increment PC
41More Complex Example Loop
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
1
00
2
01
2
02
INP 1 00
03
PC Program Counter
R1 General Purpose Register 1
INP 2 01
04
Data Bus
08
4
MMR 00 R1
05
R2 General Purpose Register 2
IR Instruction Register
MMR 01 R2
06
2
MUL R1 R2
MUL R1 R2
07
AC Accumulator
AC R1R2
MAR R1
08
8
MAM 02
09
JMP 07
10
- Fetch-Decode-Execute instruction cycle
- Fetch
- Decode
- Execute
- Increment PC
42More Complex Example Loop
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
1
00
2
01
2
02
INP 1 00
03
PC Program Counter
R1 General Purpose Register 1
INP 2 01
04
Data Bus
09
8
MMR 00 R1
05
R2 General Purpose Register 2
IR Instruction Register
MMR 01 R2
06
2
MAR R1
MUL R1 R2
07
AC Accumulator
Copy AC to R1
MAR R1
08
8
MAM 02
09
JMP 07
10
- Fetch-Decode-Execute instruction cycle
- Fetch
- Decode
- Execute
- Increment PC
43More Complex Example Loop
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
1
00
2
01
8
02
INP 1 00
03
PC Program Counter
R1 General Purpose Register 1
INP 2 01
04
Data Bus
10
8
MMR 00 R1
05
R2 General Purpose Register 2
IR Instruction Register
MMR 01 R2
06
2
MAM 02
MUL R1 R2
07
AC Accumulator
Copy AC to MEM02
MAR R1
08
8
MAM 02
09
JMP 07
10
- Fetch-Decode-Execute instruction cycle
- Fetch
- Decode
- Execute
- Increment PC
44More Complex Example Loop
CPU
Memory
ALU Performs arithmetic and logic ops as
instructed by CU
Control Unit Fetches Decodes Executes instructions
1
00
2
01
8
02
INP 1 00
03
PC Program Counter
R1 General Purpose Register 1
INP 2 01
04
Data Bus
07
8
MMR 00 R1
05
R2 General Purpose Register 2
IR Instruction Register
MMR 01 R2
06
2
JMP 07
MUL R1 R2
07
AC Accumulator
Jump to MEM07PC07
MAR R1
08
8
MAM 02
09
JMP 07
10
- Infinite loop!
- Program writes powers of 2 to MEM02 forever!
- Lets make it terminate when we reach 8
45More Complex Example Loop
- 00 Storage for starting X and termination value
(8) - 01 Storage for multiplier Y (2)
- 02 Storage for Result (powers of 2)
- 03 INP 1 00 // PUT VALUE 1 IN MEM00
- 04 INP 2 01 // PUT VALUE 2 IN MEM01
- 05 MMR 00 R1 // COPY MEM00 (1) TO REG1
- 06 MMR 01 R2 // COPY MEM01 (2) TO REG2
- 07 INP 8 00 // RE-USE MEM00, PUT VAL 8
- 08 MUL R1 R2 // ACCUMULATOR REG1REG2
- 09 MAR R1 // COPY ACCUMULATOR TO REG1
- 10 MAM 02 // COPY ACCUMULATOR TO MEM02
- 11 MMR 00 R2 // COPY MEM00 (8) TO REG2
- 12 SUB R2 R1 // ACCUMULATOR REG2 REG1
- 13 JPZ 16 // IF AC0 (REGREG2) GOTO MEM16
- 14 MMR 01 R2 // COPY MEM01 (2) BACK INTO
REG2 - 15 JMP 08 // LOOP JUMP TO MEM08
- 16 HLT // END OF THE PROGRAM
MEM
DATA
PROGRAM