Presented by Karin Shusterman

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Another use of the JTAG Interface on FPGA

• Presented by Karin Shusterman

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Introduction

• JTAG is usually used for testing the board
• The JTAG interface can be also used to configure
  FPGAs and program flash devices
• Can we do more?
• How about design testing?

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Design testing using JTAG

• The BS technology on FPGA is providing us test
  and debug capability to our design
• We use custom Instructions JTAG controller and to
  debug the logic of the design
• The JTAG controller is already built into the
  FPGA, minimizing user design

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Existing solutions

• Adding debug outputs and asserts into our design
• Using switches and LEDs on board
• Using FPGA as a black box
• The problem
• We cant know where exactly the problem is
• We need many test vectors for many different
  states
• We wish we could have a spy inside our design

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GNAT

• General-purpose Native JTAG Tester
• Configured into the FPGA in addition to our
  design
• Uses JTAG controller and resources for debug
  issues
• Allows us to enable communication with our design

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The uses for GNAT

• Replacement for external components (such as
  LEDs and switches)
• Enabling test/diagnostic modes
• Reading status/debug registers from design
• Controlling a multiplexer to select signals
  that route to external pins for monitoring
• Programming/uploading external memories that
  interface to the FPGA, such as SDRAM

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GNAT architecture
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GNAT component

• Example with 16 bits
• 16-bit USER DR defined
• The upper 8 bits of the register are used to
  control access to the GNAT peripherals
• 4 bits identify the peripheral and 4 bits are
  allocated as an opcode (read/write)
• The lower 8 bits are for data communication

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GNAT peripheral examples
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Software support

• Sample script to write to a GNAT peripheral
• 
  
• JTAG Chain
• -----------------
• Device0 Device1 Device2
• TDI gt 18V02 gt XCV50E gt XC2V4000 -gt TDO
• NOTE binary data is shifted in lsb first
• 
  
• source env(XILINX)/chipscope/tcljtag.tcl
• set handle jtag_open
• jtag_lock handle
• jtag_autodetect handle
• Shift the USER2 Instruction (b00011) into the
  Instruction Register of XC2V4000
• jtag_shiftir handle -buffer "110000" -endstate
  RTI -device 2
• WRITE Shift the 16 bit GNAT command into the
  USER2 Data Register of XC2V4000
• Peripheral 0x2

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Conclusions

• We found a way to look into the design using JTAG
  technology
• We are using existing JTAG resources
• GNAT
• Shows how you can quickly and easily add JTAG
  debug capability to your design
• Has minimal FPGA resource overhead
• A simple lightweight and flexible architecture

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Questions
?