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Title: Outline of Contents


1
Outline of Contents
  • ? Issues, Criteria and Topics.
  • ? Motivations behind This Line of Research
  • ? Survey of Typical Networks
  • ? My Research Work and Contributions

2
? Issues / Criteria / Topics
  • Topology and Analysis
  • Routing and Communication
  • Mapping and Simulation
  • Algorithm and Computation
  • VLSI Design and Construction

3
? Issues / Criteria / Topics
  • Topology and Analysis
  • degree,diameter,average distance, bisection
    bandwidth,connectivity,symmetry,recursiveness,
    scalability,Hamiltonian path
  • Routing and Communication
  • Mapping and Simulation
  • Algorithm and Computation
  • VLSI Design and Construction

4
? Issues / Criteria / Topics
  • Topology and Analysis
  • Routing and Communication
  • Pattern routing,broadcasting,multicasting,gossip
  • EvaluationEasy routing,deadlock-free,delay,traffi
    c density,
  • Control Strategy centralized/distributed,
    deterministic/adaptive,minimal/non-minimal,
  • Switching circuit/packet, wormhole, virtual
    cut-through
  • Mapping and Simulation
  • Algorithm and Computation
  • VLSI Design and Construction

5
? Issues / Criteria / Topics
  • Topology and Analysis
  • Routing and Communication
  • Mapping and Simulation
  • To compare the computing power
  • G H
  • Smallest possible dilation and congestion
  • Algorithm and Computation
  • VLSI Design and Construction

embedding
6
? Issues / Criteria / Topics
How to embed a ring into a line
1
2
8
3
7
4
6
5
1
2
3
4
5
6
7
8
Dilation7, congestion2
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2
3
4
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8
8
7
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5
1
2
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4
Dilation2, congestion2
7
? Issues / Criteria / Topics
  • Topology and Analysis
  • Routing and Communication
  • Mapping and Simulation
  • Algorithm and Computation
  • PRAM model is unpractical.
  • Basic algorithms sorting,searching,permutation,ma
    trix multiplication,bit reversal, graph
    algorithm,iteration method,symbolic computing.
  • VLSI Design and Construction

8
? Issues / Criteria / Topics
  • Topology and Analysis
  • Routing and Communication
  • Mapping and Simulation
  • Algorithm and Computation
  • VLSI Design and Construction
  • Wafer-scale integration
  • Layout design area and wire length,wire
    area,crossing number,node cost and modularity
  • Applicable to the board design

9
? Motivations
  • A branch of combinatorics
  • Structures for building multiprocessor and
    multicomputer
  • More than structural
  • ASICimplementing special parallel algorithm on
    VLSI/Wafer scale.
  • P2P overlay topologies
  • Data Center Networking
  • SoC or NoC for Many-core

10
? Big Names
  • F. Thomson Leighton (Theory) http//theory.lcs.mit
    .edu/ftl/
  • Lionel M. Ni (wormhole) http//www.cps.msu.edu/ni
    /
  • Arnold L. Rosenberg (Butterfly)
    http//www.cs.umass.edu/rsnbrg/
  • Burkhard Monien (Embedding) http//www.uni-paderbo
    rn.de/fachbereich/AG/monien/
  • Laxmi N. Bhuyan (Multi-stage) http//www.cs.tamu.e
    du/faculty/bhuyan/
  • Kenneth E. Batcher (Bitonic) http//nimitz.mcs.ken
    t.edu/batcher/index.html
  • Ivan Stojmenovic (Honeycomb) http//www.csi.uottaw
    a.ca/ivan/
  • Ke Qiu (Star and Pancake) http//dragon.acadiau.ca
    /kqiu/home.html
  • Wei Zhao (Routing) http//www.cs.tamu.edu/faculty/
    zhao/
  • S. Lennart Johnsson (Hypercube)
    http//www.cs.uh.edu/johnsson/
  • Satoshi Fujita(gossip) http//www.se.hiroshima-u.a
    c.jp/fujita/
  • William J. Dally (k-ary n-cube)
    http//www.ai.mit.edu/people/billd/
  • S. Yalamanchili (Engineering ct)
    http//users.ece.gatech.edu/sudha/
  • C.E. Leiserson (Parallel Algorithms)
    http//supertech.lcs.mit.edu/cel/
  • Kai Hwang (Benchmarking) http//ceng.usc.edu/kaih
    wang/

11
? A Special Journal on Interconnection Networks
Among the editorial board
D Frank Hsu (Fordham University) Bruce M Maggs
(Carnegie Mellon )Jean-Claude Bermond
(CNRS/INRIA/UNSA)Tse-Yun Feng (Penn State
University)Yoji Kajitani (Tokyo Institute of
Tech)F Tom Leighton (MIT)Guo-Jie Li (Chinese
Academy of Sciences)Burkhard Monien (University
of Paderborn)Howard Jay Siegel (Purdue
University)Tom Stern (Columbia University)
Website http//journals.worldscinet.com/join
12
? Survey of Network Topology
  • The following discussion of the properties of
    interconnection networks is based on a collection
    of nodes that communicate via links. In an actual
    system the nodes can be either processors,
    memories, or switches. Two nodes are neighbors if
    there is a link connecting them.

13
? Network Parameters
  • Channel width
  • Number of wires that are used per channel (i.e.
    the number of bits that can be transmitted
    simultaneously on one channel).
  • Channel direction
  • The direction in which the messages can be
    transmitted.
  • Unidirectional can send messages in just one
    direction
  • Bi-directional support two-way communication
    over the same channel.
  • Bisectional width (BW)
  • It is defined as the number of channels that are
    cut when the network is divided into two equal
    parts.

14
? Network Parameters
  • Node degree (?)
  • Number of channels connecting a node to its
    neighbors.
  • In practice the degree of a topology has an
    effect on cost, since the more links a node has
    the more logic it takes to implement the
    connections.
  • Network diameter (D)
  • Maximum distance between any two nodes in the
    network.
  • Cost Effectiveness ? x D,
  • Problem of Dense graph Given the fixed degree
    and diameter, how to design a graph which can
    contain as many nodes as possible?
  • Average distance

15
? Network Parameters
  • Number of links (l)
  • The total number of channels in the network.
  • Symmetry
  • A network is said to be symmetric if it looks the
    same from every node. (E.g. Hypercube, crossbar)
  • Recursiveness
  • A large-size network consists of two or many
    small-size networks of the same kind, such as
    tree and hypercube. This property renders the
    network suitable for solving divide-and-conquer
    algorithm

16
? Crossbar switch
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