VLSI Physical Design Automation

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VLSI Physical Design Automation
Detailed Routing (III)

• Prof. David Pan
• dpan_at_ece.utexas.edu
• Office ACES 5.434

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Channel/Switch Box Routing Algorithm

• Graph theory based algorithm
• Yoshimura and Kuh
• Greedy algorithm
• Rivest and Fiduccia
• Maze routing and its variations
• Lee, Robin, Soukup, Ohtsuki
• Hierarchical wire routing
• Burstein and Pelavin

Channel routing
Channel / switchbox and general area routing
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Over-the-Cell Routing

• Channel width can be reduced if some nets can be
  routed outside the channel.
• The metal layers available over the cell rows can
  be used for routing. (It is possible due to the
  limited use of the M2 metal layer within the
  cells.)
• Commonly used in standard-cell design.

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Two-LayerOver-the-Cell Router

• Over-the-Cell Channel Routing, J. Cong and C.
  L. Liu, TCAD, pages 408-418, 1990.

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Boundary Terminal Model (BTM)
Terminal Rows
VDD
GND
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The Routing Problem

• Boundary Terminal Model (BTM)
• Two routing layers in the channel.
• One routing layer for over-the-cell routing, so
  the routing must be planar.

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Hyper-terminal

• A Hyper-terminal is a set of terminals connected
  by over-the-cell wires.

Hyper-terminals A,C, B, D,F,K, E, G,I,
H, J
A
B
C
D
E
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K
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Hyper-terminals L, M,O, N, P, Q,U,V,
R,T, S
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Three Steps of the Algorithm

• Routing over the cells.
• Select a net segment from each multi-terminal net
  to be connected in the channel.
• Routing in the channel.

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Routing Over the Cells

• Reduced to a Multi-Terminal Single-Layer
  One-Sided Routing Problem (MSOP).
• Solved by dynamic programming.

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MSOP

• The fewer the number of hyper-terminals resulted,
  the simpler the subsequent channel routing
  problem.
• Routing a row of terminals using a single routing
  layer on one side of the row such that the number
  of hyper-terminals is minimized.

?
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Can you give a solution for this instance?
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MSOP

• Can be solved by dynamic programming.
• Consider the sub-problem from column i to j. Let
  M(i, j) be the maximum reduction in the number of
  hyper-terminals from i to j.

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MSOP
Putting the two cases together M(i, j) ???
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MSOP Algorithm

• Let n be the total number of pins on the row.
• MSOP algorithm

For i 1 to n M(i, i) 0 For j ?? to ?? For
i ?? to ?? Compute M(i, ij) Return M(1, n)
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Runtime of MSOP

• Let n be the total number of columns. For each
  (i, j), M(i, j) can be found in O(?) time. There
  are O(n2) pairs of (i, j). So
• Total time O(?)

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Selection of Net Segment

• Need to determine which terminal within a
  hyper-terminal to be used in the subsequent
  channel routing.
• Can be transformed to a special spanning forest
  problem.

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Pick one out of four
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Connectivity Graph

• A weighted multi-graph. Each hyper-terminal is
  represented by a vertex and each net is
  re-presented by a connected component.

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Minimum DensitySpanning Forest Problem (MDSFP)

• Want to connect hyper-terminals of the same net
  together.
• That is, finding a spanning tree for each
  connected component, or finding a spanning forest
  for the whole connectivity graph.
• The goal is to minimize the channel density. This
  problem is NP-Complete.
• Efficient heuristic is proposed.

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Heuristic for MDSFP

• For each edge e, let r(e) d(e)/D, where d(e) is
  the density of the interval associated with edge
  e and D is density of the whole channel. r(e)
  measures the relative degree of congestion over
  the interval associated with e.
• The heuristics repeatedly removes edges of high
  r() from the connectivity graph until a spanning
  forest is obtained. The value of r(e) for each
  edge e is updated after each removal.

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Via Minimization

• In VLSI fabrication, the yield is inversely
  related to the number of vias.
• Every via has an associated resistance that
  affects the circuit performance.
• The size of a via is usually larger than the
  width of a wire. As a result, more vias will lead
  to more routing space.

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Two Different Problems

• Constrained Via Minimization (CVM)
• Unconstrained Via Minimization (UVM)

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Constrained Via Minimization(CVM)

• Given a detailed routing solution, minimize the
  number of vias by assigning wire segments to
  different layers. Vias occur only at the turning
  points.
• Also called the Layer Assignment Problem.

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Unconstrained Via Minimization (UVM)

• Minimize the number of vias during routing. Vias
  can occur anywhere as needed.
• Consider an unreserved layer model for routing
  (both vertical and horizontal wires can be routed
  on the same layer in each region).

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Topological Routing

• UVM is also known as Topological Routing.

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CVM and UVM

• UVM is less popular than CVM since via
  minimization is usually considered secondary.
  Minimization of channel width, completion of
  routing, and minimization of total wirelength are
  considered more important.

• Note modern routers usually will follow
  preferred layers. So via minimization
  essentially is to minimize the number of bends.
• We will show CVM just to illustrate some
  algorithmic aspects of via minimization.

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CVM by Reduction toMaximum Cut Problem

• Optimal Layer Assignment for Interconnect, R.
  Y. Pinter, IEEE Intl Conf. Circuits and
  Computers, pages 398-401, Sept. 1982.

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Overview

• For two routing layers.
• Partition the routing region into clusters such
  that no junction is of degree more than 3.
• The problem can be transformed to finding a
  maximum cut in a graph.

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Cluster Graph Representation
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h7
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Via
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Layer Assignment

• In every cluster, there are only two possible
  ways to assign layers.

Class C1 Horizontal wires on layer 1 Vertical
wires on layer 2
Class C2 Horizontal wires on layer 2 Vertical
wires on layer 1
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Assign Clusters to C1 and C2

• If two adjacent clusters are in the same class,
  the via candidates joining them are needed.
• If two adjacent clusters are in different
  classes, the vias candidates joining them are not
  needed.

Same Class
Different Classes
C2
C2
C2
C1
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Example of Class Assignment
C1
C1
Cluster Graph
S1
S3
h7
C1
S4
C2
h3
h1
S2
S5
C2
C1
C1
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h5
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h8
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S3
S4
Original 8 vias This solution 4 vias
h7
S1
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h6
S2
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S7
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Example of Class Assignment
C1
C1
S1
S3
h7
A better solution
C2
S4
C1
h3
h1
S2
S5
C1
C2
C2
S6
h5
h2
S7
h8
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Class Assignment Problem

• No. of vias No. of via candidates No. of
  edges connecting a vertex in C1 and a vertex in
  C2

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Maximum Cut Problem

• The layer assignment problem is equivalent to the
  Maximum Cut Problem of a graph.
• The Maximum Cut Problem is
• NP-Complete for general graphs.
• Solvable in polynomial time for planar graphs.
• Hadlock 1975, SIAM Journal on Computing
• Cluster graphs are planar.

A cut
Maximum cut A cut with the maxi- mum no. of
edges
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Other Routing Issues

• Gridless Routing
• Multi-level routing
• DSM effects

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Gridless Detailed Routing

• Gridless Routing
• More flexible
• Longer runtime due to complex data structure
• Gridless Detailed Routing Algorithms
• Shape (Tile) based routing Sato, et al., ISCS87,
  Margarino, et al., TCAD87, Dion, et al., WRL
  Research Report 95/3, Liu, et al., ISPD98
• Graph-based routing Wu, et al., TC87, Ohtsuki,
  ICCAS85, Cong, et al., Zheng, et al., TCAD96,
  ICCAD99
• Subgrid routing US Patent, 6,507,941 B1, Jan.
  2003

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Multilevel Routing Framework (MARS TCAD05)
Detailed routing
Fine routing tile generation

• Implicit graph gridless routing

G0
G0
G1
G1
Gk
Coarsening
Refinement

• History-based iterative refinement

• Multicommodity flow based algorithm

Initial routing
Courtesy Prof. Jason Cong
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DSM Considerations

• Antenna effects
• Crosstalk noise
• Interconnect optimization planning
• Manufacturability
• Will be covered in EE382V, Optimization Issues in
  VLSI CAD