Intel 8051

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Intel 8051

• Another family of microcontroller is the Intel
  8051 family. The basic 8051 microcontroller has
  four parallel input/output ports, port 0, 1, 2
  and 3. The 8051AH version has 4K x 8 bytes ROM ,
  128 x 8 bytes RAM, two 16-bit timers and
  interrupt control for five interrupt sources.

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Intel 8051

• The 8051 is a second-generation Intel 8-bit
  microcontroller. The first Intel 8-bit
  microcontroller was the 8048.
• Later, Intel introduced the 8049, which double
  the amount of ROM and RAM. Its architecture is
  the same as the 8048
• A later introduction, the 8052, expands the size
  of ROM and RAM, but otherwise the architecture is
  the same as the 8051.

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Intel 8051

• An 8-bit ALU
• 4K x 8 ROM (or EPROM)
• 128 x RAM
• Dual 16-bit timer event counter
• 32 I/O lines (4 I/O ports, 8-bit each)
• Powerful 111-instruction set
• Full-featured serial port
• Up to 12-Mhz clock
• Two external interrupts

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Intel 8051

• The 8051 can address external memory if there is
  not enough internal RAM and/or ROM. When used to
  address external memory, two ports provide the
  memory addressing.
• The 8051 internal ROM is for program memory
  space. The program memory space is a read-only
  space. The processor cannot write data or read
  data from these memory locations.

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Intel 8051

• The RAM is the data memory space. It is a
  read-write memory space.
• The processor can read data from this memory
  space and can write data to this memory space. It
  cannot execute program instructions from this
  memory space.
• The 128 bytes of internal RAM (00H to 7FH)
  provide general read-write data storage. Part of
  this memory space is often referred to as general
  purpose registers.

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Intel 8051

• The 8051 also has 22 special-function registers
  occupy data memory space from 80H to F8H.
  Although addressable as memory locations, these
  registers must be used for their intended
  purpose.
• If more program memory (ROM) is needed, the
  internal 4-Kbyte memory can be expanded by
  additional 60-Kbytes, giving the 8051 a full
  64-kbytes program memory space. (see figure 9.1)

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Intel 8051

• If the 8051 EA pin is connected to ground, it
  does not use the internal 4K ROM. The external
  memory must start at memory location 0000H and
  can be up to a full 64kbytes. (8031 does not have
  internal ROM)

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Figure 9.1
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Figure 9.2
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Intel 8051

• If you need more RAM, you can add external data
  memory. You always have full use of all 64-kbytes
  of the external memory space. This memory is
  addressed separately from the internal 128 bytes
  of RAM.

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Downloaded Program

• Although the 8051 normally operates with separate
  program memory and data memory space, there are
  applications where 8051 can input a block of data
  through its serial communications port, load that
  data into memory, and then execute that data as a
  program. It is a very common technique used to
  change the program operating in a remote
  microprocessor-based controller.

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Intel 8051 Internal RAM

• The first 32 RAM locations are addressable as
  registers or as memory locations. By calling some
  memory locations registers, we can access them
  with single-byte instruction.
• 16 bytes of 8051 RAM are both bit and
  byte-addressable. The general instructions can
  address a byte of data at these memory locations.
  Other special instructions can address any
  individual bit in these memory locations. Bit
  instructions are very powerful tools when you
  need to process data words from external hardware
  devices.

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Intel 8051 Internal RAM ..

• Figure 9.2 is a memory map of the first 128
  internal memory locations. The first 32 memory
  locations can be used as four register banks.
  There are eight registers in each bank. A
  register is an 8-bit read-write memory location
  which is addressed in a single-byte instruction.
  Because these single-byte instructions have only
  3 bits available to address the register, they
  address only one of eight registers.

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Special Function Registers

• Special-function registers (SFRs). Each
  special-function register is dedicated to a
  single job.
• The microprocessors SFRs are the accumulator
  (ACC E0H), the B register (B F0H), the program
  status word (PSW D0H), the stack pointer (SP
  81H), the data pointer (DPTR) which is a 2 bytes
  register (DPL 82H and DPH 87H), and the power
  control register (PCON 87H).

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Special Function Registers

• Some of these SFRs are bit- and byte-addressable
  and others are only byte-addressable.
• The accumulator is byte- or bit-addressable. It
  contains the operands or one of the operands of
  arithmetic or logical instruction and holds the
  result of that instruction.
• The B register is used during multiply and divide
  operations as one 8-bit source and to hold the
  high-order 8 bits. It also can be as a simple
  scratch-pad register.

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Special Function Registers

• The program status word (PSW) is the 8051 status
  register. It is a bit-addressable
  register.7 CY PSW.7 Carry flag6 AC PSW.6 Auxili
  ary carry flag5 F0 PSW.5 For general purpose
  use4 RS1 PSW.4 Register bank selector bit
  13 RS0 PSW.3 Register bank selector bit
  02 OV PSW.2 Overflow bit1 - PSW.1 Reserved0 P P
  SW.0 Parity flag

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Special Function Registers

• Note that the 8051 PSW does not have zero bit.
• Two special bits in the PSW (RS1 and RS0)
  indicate the current register bank. These bits
  can be set to select the current register bank or
  can be read to find out what register bank is
  selected
• The 8051 stack pointer register is an 8-bit
  register, so it only addresses memory locations
  within the internal 128-bytes memory. It is
  incremental just before data is stored by using
  the push or call instruction, or the interrupt.

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Data Pointer

• The data pointer (DPTR) is a 16-bit register. It
  is made up of a High byte (DPH) and a Low byte
  (DPL). The data pointer holds a 16-bit address
  used when addressing external memory. The 8051
  instructions let you work with the data pointer
  as a 16-bit register or as two separate 8-bit
  registers. If needed, a single- or double-byte
  instruction can operate on either the High or Low
  byte.

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Power Control Register

• Two bits of this register, PD (Power Down) and
  IDL (Idle), are only used in CMOS versions of the
  8051. Bit 7 SMOD Double baud rate bitBit
  3 GF1 General purpose flag bitBit
  2 GF0 General purpose flag bitBit 1 PD Power
  down bitBit 0 IDL Idle mode bit

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Counter-Timer Control Register

• TCON is used to control the function of
  counter-timer.TF1 TCON.7 Timer 1 overflow
  flagTR1 TCON.6 Timer 1 run control
  bitTF0 TCON.5 Timer 0 overflow
  flagTR0 TCON.4 Timer 0 run control
  bitIE1 TCON.3 External interrupt 1
  flagIT1 TCON.2 Interrupt 1 type
  controlIE0 TCON.1 External interrupt 0
  flagIT0 TCON.0 Interrupt 0 type control

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Counter-Timer Mode Control Register

• It is used to set the mode of counter-timers.Bit
  7 (Timer 1) Gate, when TR1 of TCON is set
  and Gate1, Timer1 will run only while INT1
  pin is high.Bit 6 (Timer 1), C/T, timer or
  counter selectorBit 5 (Timer 1) M1, Mode
  selector bit 1
• Bit 4 (Timer 1) M0, Mode selector bit 0

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8051 Interrupt System

• There are five different ways to interrupt an
  8051. Two of these are from external electrical
  signals. The other three are caused by internal
  8051 I/O hardware operations.
• The two external inputs come from the INT0 and
  INT1 inputs. A logic 0 on INT0 sets bit IE0
  (interrupt external 0) in the timer control
  register. A logic 0 on INT1 sets bit IE1

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Intel 8051
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Intel 8051

• Port 0 is at address 80H, port 1 at address 90H,
  port 2 at address A0H and port 3 at address B0H.
  When a port is to be used as an output port the
  data is put into the corresponding special
  register. When a port is to be used as an input
  port, the value FFH must first be written to it.

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Intel 8051

• RXD is the serial input port
• TXD is the serial output port
• INT0 is the external interrupt 0
• INT1 is the external interrupt 1
• T0 is the timer/counter 0 external input
• T1 is the timer/counter 1 external input
• WR is the external memory write strobe
• RD is the external memory read strobe

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Intel 8051

• The term strobe describes a connection used to
  enable or disable a particular function.
• ALE
• The address latch enable pin provides an output
  pulse for latching the low-order byte of the
  address during access to external memory. This
  allows 16-bit addresses to be used. (see next
  slide)

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Use of ALE
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Intel 8051

• PSEN
• The program store enable pin is the read signal
  pin for external program memory and is active
  when low. It is connected to the output enable
  pin of external ROM or EPROM.
• EA
• The external access pin is taken low for the
  microprocessor to access only external program
  code when high it automatically accesses
  internal or external code, depending on the
  address. This pin also used on a microcontroller
  with EPROM to receive the programming supply
  voltage for programming the EPROM

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Intel 8051

• XTAL1, XTAL2
• These are the connecting pins for a crystal or
  external oscillator.
• RESETA high signal for a minimum of two machine
  cycles on this pin resets the microcontroller.

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Intel 8051

• Serial input/output
• Writing to the serial data buffer SBUF at
  address 99H load data for transmission reading
  SBUF accesses received data.
• TimingThe timer mode register TMOD at address
  89H is used to set the operating mode for timer 0
  and timer 1. The timer control register TCON
  contains status and control bit for timer 0 and
  timer 1.

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Intel 8051

• Interrupts
• Interrupts force program to call a subroutine
  located at a specified address in memory they
  are enable by writing to the interrupt enable
  register IE at address A8H.
• Bit 7 EA (Global Enable/Disable)Bit 4 ES
  (Enable serial port interrupt)Bit 3 ET1
  (Enable Timer 1 interrupt)
• Bit 2 EX1 (Enable external 1 interrupt)Bit 1
  ET0 (Enable timer 0 interrupt)Bit 0 EX0
  (Enable external 0 interrupt)