[e-mail]

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????????

• ???
• zjqiu_at_fudan.edu.cn
• ???????435?

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??? ?? ??? ???? ??? ?????????? ???
?? ??? ??? ??? ??? ???
???? ??? ???? ??? ?? ???
????? ???? ??????? ???? ???????
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• MOS????
• ?????????
• ??CMOS????

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MOS IC???????

• MOS???????,MOS???????,?????????????
• ?????VTF?,VTF???????3-4 V,????MOS??????1 pA?
• ?????????????VTF???T?25??125 ?C,VTF??2 V?

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MOS IC???????

• ????VT???
• ??????,??????7-10?
• ????????????(Channel-stop implant,?????? )

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1?LOCOS????????
(40nm)
(80nm)
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LOCOS???????
2)????? ??????????
1)???? ????????
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???LOCOS?? PBL(polybuffered LOCOS)
?LPCVD Si3N4?,????????,???????????????O???????0.1-
0.2mm?
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PBL
????????? ??Si3N4???????
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2?STI(Shallow Trench Insulation) ?????
LOCOS?PBL????????0.35-0.5 mmlt0.35 mm????STI
1)????
2)???? (20 nm)
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3)LPCVD??? (100 nm)
4)?????
5)????? (0.5 mm)
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6)????????? (20 nm)
7)????????
8)CVD ???????
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9)CMP???
10)??????????CVD???
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??STI??(CMOS)
1)?????????
USG(Un-doped Silicate Glass)SiH4O2Ar?USG
volatiles?
2)HDPCVD?????
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3)CMP???
4)??????USG
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?????????
???SiO2-???(Al?),????????,????VT
?Al?????????????? ?????????-???????
???????,VT????1.21.4 V

• ?????????
• ?????????MS??p-poly???VT??1.1 V,???????????dual-po
  ly(n p)???
• ????????,???????????

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1??????????
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LDDspacer????????
1)LDD??
2)????
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3)??????
???????
TiSi2,CoSi2,NiSi
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??SOI CMOS????
SOI??Cu????
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(No Transcript)
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Wafer cleaning
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Wafer cleaning
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alignment, exposure, PEB, development and
inspection
mask0
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Strip PR and Screen Oxide Wafer cleaning
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Pad thermal oxidation LPCVD Nitride
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PR coating and pre-baking
mask1
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PEB, development inspection Etch pad oxide and
nitride
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Strip PR etch Si
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Strip nitride oxide Wafer cleaning
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(No Transcript)
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(No Transcript)
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PR coating and pre-baking, mask alignment
exposure, PEB, development and inspection
mask2
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(No Transcript)
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PR coating and pre-baking, mask alignment
exposure, PEB, development and inspection
mask3
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(No Transcript)
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Strip PR sacrificial oxide Wafer cleaning
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PR coating and pre-baking, mask alignment
exposure, PEB, development and inspection
a-Si etching
mask4
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Strip PR, wafer cleaning, a-Si annealing and
oxidation
oxide
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PR coating and pre-baking, mask alignment
exposure, PEB, development and inspection
mask5
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(No Transcript)
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PR coating and pre-baking, mask alignment
exposure, PEB, development and inspection
mask6
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(No Transcript)
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(No Transcript)
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PR coating and pre-baking, mask alignment
exposure, PEB, development and inspection
mask7
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(No Transcript)
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(No Transcript)
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PR coating and pre-baking, mask alignment
exposure, PEB, development and inspection
mask8
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(No Transcript)
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Ar2 Sputtering etching(SiO2?????)
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(No Transcript)
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(No Transcript)
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(No Transcript)
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PR coating and pre-baking, mask alignment
exposure, PEB, development and inspection
mask8
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(No Transcript)
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(No Transcript)
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Ar2 sputtering etching
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(No Transcript)
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(No Transcript)
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(No Transcript)
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Ar2 Sputtering etching
SODSpin On Dielectric
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(No Transcript)
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(No Transcript)
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(No Transcript)
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(No Transcript)
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(No Transcript)
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Mask 16?17
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Mask 18?19
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(No Transcript)
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Mask 20
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ship to testing
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(No Transcript)
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Ar2 sputtering etching
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Mask 21
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(No Transcript)
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(No Transcript)
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??Dicing????Flip-chip packaging
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On-Time 2 Year Cycles