ADMS: Compact Model Synthesis PART I: Introduction and development outlook

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ADMS Compact Model SynthesisPART I
Introduction and development outlook
Laurent Lemaitre Freescale - Geneva Ben
Gu Freescale - Austin
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Outline of Presentation

• Device Models in CAD tools
• Device Model Implementation hand-crafted
• ADMS software tool - translates Verilog-AMS to C
• Overview of the Device Model Generator
• Example of Model Generation
• Ngspice Interface
• Work on progress
• Conclusion

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Device Models in CAD tool
Spice netlists Process libraries (model
parameters)
Electrical Circuit Simulator
DESIGNER
Simulation Results
Spectre, ADS, Mica, ..
done manually or use model compiler (ADMS)
Built-in Device Model EquationsVBIC, EKV, SP,
MOSCAP, R3, ..
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Model ImplementationHand-crafted

• Device Model Engineer
• provides equations of new model
• to programmer. No standard.
• Programmer
• hand-codes the model in source code of the
  electrical circuit simulator (most of the time
  the language is C). No standard.
• C code must comply with the Simulator Programming
  Interface. Much coding needs to be done again for
  each simulator.
• C code involves the manual computation and coding
  of partial derivatives. This process is tedious
  and error-prone.
• C code is hard to read. Feedback to the Device
  Model Engineer is made difficult.
• The process is a barrier to model maintenance
  and enhancement.

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ADMS Approach

• ADMS translates Verilog-AMS to ready-to-compile C
  code for simulator API (application programming
  interface)
• ADMS uses Verilog-AMS as input.
• Advantages of Verilog-AMS
• Verilog-AMS code easy to read - no extra code
  specific to simulators.
• Model can be easily and completely tested prior
  implementation !
• ADMS uses XML (successor of HTML ) as internal
  language to build the translators from
  Verilog-AMS to Simulator API
• Simplifies development of new features of ADMS
  and support of multiple simulators

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ADMS Translator
STANDARD 1 AT MODEL LEVEL
DTD basedvalidation
Verilog-AMS Model Code
Parsing
STANDARD 2 AT SIMULATOR LEVEL
Internal
XML program
data
Other
Code Generator
applications
Testing prior implementation
C code Mica, Spectre, ADS,
Documentation
Circuit Test benches
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Example Verilog-AMS I

• define NPN 1
• define PNP 1
• module BIP (c,b,e)
• // Nodes
• input c,b // input nodes
• output e// output nodes
• electrical c,b,e // all electrical
• // Branches
• branch (b,c) bc
• branch (c,e) ce
• branch (e,c) ec
• branch (b,e) be

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Example Verilog-AMS II

• // Parameters
• parameter real is 1.0e-16
• parameter real bf 100
• parameter real br 1
• parameter real nf 1.0
• parameter real nr 1.0
• parameter integer type NPN
• // Variables
• real Tdev, Vtv
• real Ifi, Ibf
• real Iri, Ibr
• real argf,expf

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Example Verilog-AMS III

• analog begin // Analog section
• Tdev temperature
• Vtv 1.380662e-23 Tdev / 1.602189e-19
• if ( type NPN ) begin
• argf V(be) / ( nf Vtv )
• end else if ( type PNP ) begin
• ...
• expf exp(argf)
• Ifi is (expf-1.0)
• Ibf Ifi/bf
• begin
• I(ce) lt Ifi // FORWARD Transport C-E
• I(be) lt Ibf // FORWARD Diode B-E
• end

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Example Code for Spectre
SPECTREinterface.h BIPdefs.h BIPinitParameter.c BI
PloadJacobian.c BIPevaluateStatic.c BIPevaluateDyn
amic.c
BIPOLAR TRANSISTOR in VERILOG-AMS
Run admsSpectre
Ready-to-compile C code
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Example Test-bench Circuit

• Automatically Generated by ADMS

Cint
1 kOhm
Bint
1 V
1 kOhm
Eint
1 V
1 Ohm
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Example Comparisons
spectre DC Analysis opPoint' Operating at T 27 C. V(Bint) 650.428 mV V(Cint) 921.346 mV V(Eint) 79.0034 mV I(vbp) -349.572 uA I(vcp) -78.6538 mA Power Dissipation 79.0 mW Ads Agilent Technologies. DC Operating Point V(Bint) 650.428 mV V(Cint) 921.346 mV V(Eint) 79.0034 mV vb.i -349.572 uA vc.i -78.6538 mA ---------------------
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NGSPICE support

• Motivation standardization effort
• Link to home page http//ngspice.sourceforge.net/
  adms.html
• How to http//ngspice.sourceforge.net/admshowto.h
  tml
• ADMS distribution in ngspice
• ADMS is distributed separately from ngspice. You
  can download the ADMS compiler from it's web
  site. Once you have downloaded and installed the
  compiler, you can add Verilog-AMS model to
  ngspice.
• The process of adding a new device is far from
  being automatic and need a certain knowledge of
  spice internals. The file README.adms distributed
  with ngspice describes the process.
• Plan update the XML interface by Q4-2006
  integrate the latest versions of psp, hicum and
  mextram.

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Work in Progress

• ADMS is written in the C language
• Current release 2.2.4
• Next release 2.2.5 planned by end of October
• documentation
• stronger XML parsers
• faster (5X)
• ADMS is open-source mot-adms.sourceforge.net
• Port to freeBSD (July 2006)

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Work in Progress

• Working with Agilent to provide a free MINT
  interface
• end 2006
• Cadence provides support through CMI
• Helene Parruit (ENSIB) writes the QUCS XML
  interface
• Mentor Graphics is currently its XML interface
  for ADMS
• The PSP family used ADMS to release its simkit
  version
• Simucad who uses ADMS to implement some of its
  models.

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Conclusion

• ADMS automatic implementation of compact
  models into circuit simulators
• ADMS automatically generates efficient, robust,
  correct-by-construction code
• (bsim3 same speed as hand-crafted reported in 2
  cases)
• ADMS has been successfully used for the
  integration of new device models into Mica,
  Spectre, HSIM and ADS
• Compact models are defined by Verilog-AMS, a
  standard high-level language