CENG 241 Digital Design 1 Lecture 5

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CENG 241Digital Design 1Lecture 5

• Amirali Baniasadi
• amirali_at_ece.uvic.ca

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This Lecture

• HW 2 Due Friday June 13 th.

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Three-input XOR Function
F A XOR B XOR C
Multiple input XOR is 1 only if the number of 1
variables is odd ODD function
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ODD Function Implementation
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Four-input XOR Function
F detects odd number of 1s, F detects even
number of 1s
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Parity Generation and Checking

• Parity bit extra bit to ensure correct
  transmission of data
• Parity bit is included in the message to make the
  number of 1s either odd (odd parity) or even
  (even parity).
• We can use XOR to see if the number of 1s is
  odd.
• We can use XOR-invert to see if the number of 1s
  is even.
• We include the XOR output in the message
• Later at receiver we check the number of 1 bits
  to see if the transmission is correct.

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Parity Generation and Checking circuits
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Combinational Logic
Combinational Logic Output only depends on
current input Sequential LogicOutput depends on
current and previous inputs
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Design Procedure

• 1.The number of inputs and outputs?
• 2.Derive the truth table
• 3.Obtain the Boolean Function
• 4.Draw the logic diagram, verify correctness

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Design Procedure example

• Binary Adder-Subtractor
• Basic block is a half adder.
• Half Adder Design
• 1.needs 2 inputs 2 outputs
• 2. Truth Table
• x y C S
• 0 0 0 0
• 0 1 0 1
• 1 0 0 1
• 1 1 1 0
• 3. Sxyxy Cxy

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Half Adder circuit
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Full Adder?

• Truth Table
• x y z C S
• 0 0 0 0 0
• 0 0 1 0 1
• 0 1 0 0 1
• 0 1 1 1 0
• 1 0 0 0 1
• 1 0 1 1 0
• 1 1 0 1 0
• 1 1 1 1 1

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Full Adder Map
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Full Adder Circuit
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Full Adder Circuit
Half adder ?
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4-bit Adder Circuit
But this is slow...
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Binary Subtractor

• Subtraction is done by using complements
• As 2s Complement A1
• A-B A B1

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4-bit adder subtractor
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Binary Multiplier

• Binary mult. Is done the same way of decimal
  mult.
• Multiplicand is multiplied by each bit of the
  multiplier.

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Binary Multiplier
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4-bit by 3-bit Binary Multiplier
B3 B2 B1 B0
A2 A1 A0 A0B3
A0B2 A0B1 A0B0 A1B3 A1B2 A1B1
A1B0 A2B3 A2B2 A2B1 A2B0
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HW 2

• Homework 2 Chapter 4 problems 5, 6(a), 9, 20(a)
• Due Friday June 13th.