Research Roadmap Past

1
Research RoadmapPast Present Future

• Robert Brayton Alan Mishchenko
• Logic Synthesis and Verification Group
• UC Berkeley

2
Overview

• Past work
• Espresso
• SIS
• MVSIS
• Current work
• ABC
• Future work

3
Past 25 Years
Espresso (two-level synthesis) Binary and
multi-valued SOP minimization, pair-decoding,
disjoint covers, etc
SOPs
1982-1985
MIS-II (multi-level synthesis) Factoring,
extracting shared logic, elimination,
resubstitution, simplification, etc
SOPs
1985-1990
SIS (sequential multi-level synthesis) Dont-cares
, retiming, state-encoding, tech-mapping,
asynchronous, etc
SOPs BDDs
1990-2000

• Various adaptations of these tools still used
  extensively in commercial CAD

4
Logic Synthesis is Dead (1991 2005)

• 1991
• A. Richard Newton, Has CAD for VLSI reached a
  dead end? VLSI 91
• 1997
• K. Keutzer, A. R. Newton, N. Shenoy, The future
  of logic synthesis and physical design in
  deep-submicron process geometries. ISPD 97
• 2005
• R. Madhavan, The death of logic synthesis,
  Keynote at ISPD 05

5
Revival in Past 7 Years
SOPs, BDDs, ZDDs
MVSIS Multi-valued network optimization,
encoding, non-determinism, FSM synthesis,
etc And-Inv Graphs (AIGs), tech-mapping,
dont-cares, equivalence checking, etc
2001-2003
AIGs, BDDs
2004-2005
ABC AIG rewriting, priority cuts, resynthesis,
sequential synthesis and verification, etc
AIGs, truth tables, SAT
2005-now
6
ABC Highlights

• Rewriting the book of logic synthesis
• almost all classical methods have been replaced
  by fast heuristic iterative transforms
• Based on methods that are
• high speed
• scalable
• SAT-based
• Becoming a new standard of reference for
• logic synthesis
• verification

7
Example of Emerging Logic Synthesis
Equivalent AIG in ABC
AIG is a Boolean network of 2-input AND nodes and
invertors (dotted lines)
8
One AIG Node Many Cuts
Combinational AIG

• Each node in an AIG has many cuts
• Each cut represents a different SIS node
• No a priori fixed boundaries
• Implies that AIG manipulation with cuts is
  equivalent to working on many Boolean networks at
  the same time

f
a
c
d
e
b
Different cuts for the same node
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Current Work (2007)
ABC-5
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Next 5 Years (2007-2012)
ABC-8
11
Next 25 Years

• Is logic synthesis finally dead?
• NO!
• Alive and well and living in Berkeley? ?
• It is a fundamental issue
• Difficult problems will force new solutions