Chapter 10 Analog Integrated Circuits and its application

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Chapter 10 Analog Integrated Circuits and its
application

• Introduction
• The 741 Op-Amp Circuit
• The ideal Op Amp
• The inverting configuration
• The noninverting configuration
• Integrator and differentiator
• Other operation application

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Introduction
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Content

• Part 1. The 741 Op-Amp Circuit and analysis.
• Part 2. Analog integrated circuits application
• _ the application of operational
  amplifier
• _ the application of comparer
  circuits

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Part I

• Analog ICs include operational amplifiers, analog
  multipliers, A/D converters, D/A converters, PLL,
  etc.
• A complete op amp is realized by combining analog
  circuit building blocks.
• The bipolar op-amp has the general purpose
  variety and is designed to fit a wide range of
  specifications.
• The terminal characteristics is nearly ideal.

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The 741 Op-Amp Circuit
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Structure

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General Description

• 24 transistors, few resistors and only one
  capacitor
• Two power supplies
• Short-circuit protection

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The Input Stage

• The input stage consists of transistors Q1
  through Q7.
• Q1-Q4 is the differential version of CC and CB
  configuration.
• High input resistance.
• Current source (Q5-Q7) is the active load of
  input stage. It not only provides a
  high-resistance load but also converts the signal
  from differential to single-ended form with no
  loss in gain or common-mode rejection.

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The Intermediate Stage

• The intermediate stage is composed of Q16, Q17
  and Q13B.
• Common-collector configuration for Q16 gives this
  stage a high input resistance as well as reduces
  the load effect on the input stage.
• Common-emitter configuration for Q17 provides
  high voltage gain because of the active load
  Q13B.
• Capacitor Cc introduces the miller compensation
  to insure that the op amp has a very high
  unit-gain frequency.

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The Output Stage

• The output stage is the efficient circuit called
  class AB output stage.
• Voltage source composed of Q18 and Q19 supplies
  the DC voltage for Q14 and Q20 in order to reduce
  the cross-over distortion.
• Q23 is the CC configuration to reduce the load
  effect on intermediate stage.
• Short-circuit protection circuitry
• Forward protection is implemented by R6 and Q15.
• Reverse protection is implemented by R7, Q21,
  current source(Q24, Q22) and intermediate stage.

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The Output Stage
(a) The emitter follower is a class A output
stage. (b) Class B output stage.
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The Output Stage

• Wave of a class B output stage fed with an input
  sinusoid.
• Positive and negative cycles are unable to
  connect perfectly due to the turn-on voltage of
  the transistors.
• This wave form has the nonlinear distortion
  called crossover distortion.
• To reduce the crossover distortion can be
  implemented by supplying the constant DC voltage
  at the base terminals.

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The Output Stage

• QN and QP provides the voltage drop which equals
  to the summer of turn-on voltages of QN and QP.
• This circuit is call Class AB output stage.

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The Biasing Circuits

• Reference current is generated by Q12, Q11 and
  R5.
• Wilder current provides biasing current in the
  order of µA.
• Double-collector transistor is similar to the
  two-output current mirror. Q13B provides biasing
  current for intermediate stage, Q13A for output
  stage.
• Q5, Q6 and Q7 is composed of the current source
  to be an active load for input stage.

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The Ideal Op Amplifier
symbol for the op amp
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The Ideal Op Amplifier
The op amp shown connected to dc power supplies.
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Characteristics of the Ideal Op Amplifier

• Differential input resistance is infinite.
• Differential voltage gain is infinite.
• CMRR is infinite.
• Bandwidth is infinite.
• Output resistance is zero.
• Offset voltage and current is zero.
• No difference voltage between inverting and
  noninverting terminals.
• No input currents.

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Ideal Op amplifier works at linear region
uo Aod ( uN - uP )
1. Differential input voltage is zero
uN uP
Virtual short circuit
2. Input current is zero
iN iP 0
Virtual disconnect circuit
Working at linear region ? circuit with negative
feedback
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Ideal Op amplifier works at nonlinear region
uo ? Aod ( u - u- )
1. Vo have only two value
uo UOPP when ugt u-
uo - UOPP when u lt u-
Virtual short circuit doesnt exsist
2.
i i- 0 Virtual disconnect-circuit
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Equivalent Circuit of the Ideal Op Amp
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The Inverting Configuration

• Virtual short circuit.

• Virtual disconnect-circuit

Virtual ground that is, having zero voltage but
not physically connected to ground
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The Inverting Configuration

• The inverting closed-loop configuration.

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The Inverting Configuration
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Effect of finite open-loop gain
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The Inverting Configuration

• Shunt-shunt negative feedback
• Closed-loop gain depends entirely on passive
  components and is independent of the op
  amplifier.
• Engineer can make the closed-loop gain as
  accurate as he wants as long as the passive
  components are accurate.
• Exercises example 2.2

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Example2.2
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Homework

• May 27th, 2009
• 2.8 2.22

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The Non-inverting Configuration

• The noninverting configuration.

Series-shunt negative feedback.
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The Noninverting Configuration
Effect of finite open-loop gain
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The Voltage follower

1. The unity-gain buffer or follower amplifier.
2. Its equivalent circuit model.

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The Weighted Summer
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The Weighted Summer
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Example 2.6 A Single Op-Amp Difference Amplifier
Linear amplifier. Theorem of linear Superposition.
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A Single Op-Amp Difference Amplifier

• Application of superposition
• Inverting configuration

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A Single Op-Amp Difference Amplifier
Application of superposition. Noninverting
configuration.
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Integrators
The inverting configuration with general
impedances in the feedback and the feed-in paths.
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The Inverting Integrators
The Miller or inverting integrator.
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Frequency Response of the integrator
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The op-amp Differentiator
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The op-amp Differentiator
Frequency response of a differentiator with a
time-constant RC.
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Practical op-amp Differentiator
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Logarithm operation
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Exponential operation
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Instrumentation Amplifier
UAUI1,UBUI2
Output voltage
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Integrated Instrumentation Amplifier
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INA102
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exercises
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Homework

• June 3rd, 2009
• 2.36 2.44 2.61 2.65