?????????SystemC

1
?????????SystemC
???? SystemC??????
???? ???SystemC??????,?????,2003 ?ppt?????????,
?????????, ??????

• ???
• xuny97_at_mails.tsinghua.edu.cn
• Xuny _at_ smth
• ???9?324??
• 62781914

???? 2004
2
??????

• ??4?,?????WhyHow, ???Concept

• ????
• ????SystemC????????
• SystemC????
• SystemC??????
• SystemC??????????
• SystemC ???
• Master/Slave?
• ???

3
????

• SystemC??????

4
????????

• SystemC?????????,????????????????

• SystemC ???????????????????????????????????????

• ?SystemC?????????????RTL???10100??

• SystemC????????????????????????????????????,System
  C???????????????????????????. SystemC?????????????
  ???????????????????

5
???????

• ????????
• ??????????????,??????????,????????????????????????
  ????????? ?

• ??????????
• ?????????????????????(?????????????)????????????,?
  ??????? ??????????????????????????

• ???????????RTL?????

6
SystemC ????

• SystemC?????????????????????? (Transaction Level
  Modeling??TLM) ?(????)

• SystemC??? (Interface)??? (Port) ???
  (Channel)???????SystemC ??????? ?(??????????????)

7
??????,?????

• ???????????
• ????(??,??)
• ???????????????,????
• ????????????????
• ??

8
?????????-??-???

• ??????
• ?read (address)
• ? write (address, data)
• ??reset
• ??????
• RTL? ????,????,???,???,????
• ???????,??
• ??
• ??????
• ????
• ????

9
?????????-??-OFDM???

• ?? OFDM(??????)?????
• ?? ????,????
• ???????????????,??????

10
?????????-??-??????

• ?? ???????????
• ??
• Flash ? CPU
• CPU??RAM
• DMA??RAM
• IO??CPU
• ??
• ????

11
??????????(1 of 2)

• ???????(????,????)
• ????????,?????????????????(1CPU? 3CPU???????????)
• ??????????(???????????????)
• ??
• ??(????)?????,??????????????????????,?????????????
  ????
• ????????? - ????
• ?????
• ????
• ????

12
??????????(2 of 2)

• ??????(Interface Method Call)
• ??????????,?????????
• ?????????(method)?????(interface)
• ??(???????)??????
• ???????????(port)????????????????

?????????????????????????
13
SystemC?????????

• ??(module)???????????
• ??(channel)?????????
• ???????????????
• ??
• ???????
• ????????

14
Big Picture
15
??(Interface)

• ?????????????????????????

• ?????
• C????? ?(????????)

16
??(Interface)

• ?????????????????(?????C??????,???????????),??
  ???????????(???????????????????)

• ??(channel)?????????? ?

17
???????
enum transfer_status TRANSFER_OK 0,
TRANSFER_ERROR ??????  template
ltclass Tgt class mem_read_if public
sc_interface public virtual
transfer_status read( \
unsigned int address,T data) 0  
18
???????

• ??????
• template ltclass Tgt
• class mem_write_if public sc_interface
• public
• virtual transfer_status write(
  \
• unsigned int address,
  \
• T data) 0

19
???????
???? class reset_if public sc_interface
public virtual bool reset()0  
20
???????
???RAM?? templateltclass Tgt class ram_if public
mem_write_ifltTgt, mem_read_ifltTgt,
reset_if public virtual unsigned int
start_address() const 0 virtual unsigned
int end_address() const 0
21
??

• ???mem_read_if?mem_write_if???????????????????????
  ???????????,???????char,????short,???int,??packet
  ?

• ????????,???????????????????? ?

• ?sc_interface?????????,???????????????sc_interface
  ?????

22
??(port)

• ????????(??)???(??)

• ???SystemC????sc_inltTgt?sc_outltTgt?sc_inoutltTgt

• ???????????,SystemC?????????????
• sc_portltInterfaceType, ChannelNumber 1gt

23
??

• ????????????????????size()???????,????ram_port0.si
  ze()???????ram_port0???RAM????

24
??

• ??????????????,?????????????????????????????????,?
  ????????????????,????????1???????????? ?

• ?sc_portltIF,Ngt????????,????????IF?????,N??????????
  ????,??????,??????1?

25
????-RAM????

• SC_MODULE(Master)
• sc_in_clk clk
• sc_portltram_ifltintgtgt ram_port//????
• void main_action( )//????
• int data
• unsigned int address
• SC_CTOR()
• SC_CTHREAD(main_action,clk.pos())

26
????-RAM????
void Mastermain_action() wait() int
i0 address0//any valid address
while(ilt100) if(statusram_port-gtwrite(addre
ss,data)) //Display data else
coutltlt"RAM write fail"ltltendl 
if(statusram_port-gtread(address, data))
//Display data else coutltlt"RAM read
fail"ltltendl wait() address
27
????

• ?SystemC?,???????????????,????????????????????????
  ??????
• ???????????????
• ???????????????

• SystemC????????????????
• ???????????,?????????????,???????????????????????
• ???????????,??????????,?????????????

28
????????
Top(sc_module_name name, int size)
sc_module(name) , fifo1("Fifo1", size) ,
source1("source1") ,
sink1("sink1"), clk("Clk",PERIOD,SC_NS)
//???????? source1.write_port(fifo1)
source1.clk(clk)
sink1.read_port(fifo1) sink1.clk(clk)

include "source.h" include "sink.h define
PERIOD 20 class Top public sc_module
public sc_clock clk sc_fifoltchargt
fifo1 source source1 sink sink1
29
????

• ???????????,?????????????,???????????????????????

• SystemC 2.01????????????,???
• sc_signalltTgt,sc_signal_rvltNgt
• sc_mutex
• sc_fifoltTgt
• sc_semaphore
• sc_bufferltTgt

30
???? - sc_signalltTgt

• sc_signalltTgt???????,????????????sc_inltTgt?sc_outltTgt
  ?sc_inoutltTgt?

• ??????sc_outltTgt??sc_inoutltTgt?????sc_signalltTgt,????
  ???????????

• ?????sc_inltTgt?????sc_signalltTgt ?

• sc_signalltTgt????????,????sc_signal_inout_ifltTgt??
  ? sc_signal_inout _ifltTgt?? ????????read()?write()
  ?

31
???? - sc_signal_rvltTgt

• sc_signal_rvltTgt??????????,?sc_signalltTgt?????????
  ???????????????????

32
???? - sc_bufferltTgt

• sc_bufferltTgt???sc_signalltTgt,????write()?update()??
  ?

• sc_bufferltTgt??write()????????????,??????????sc_si
  gnalltTgt????????????????,??????????

33
???? - sc_fifoltTgt

• FIFO???

34
???? - sc_fifoltTgt

• sc_fifoltTgt?SystemC????????????FIFO?? ?

• Size??FIFO?????, ??sc_fifo,Size?????16?

35
sc_fifoltTgt?????

• sc_fifoltintgt fifo1
  //??????????????16?FIFO
• sc_fifoltpacketgt fifo2(64)//??????64?packet?
  ????FIFO

36
sc_fifoltTgt?????

• sc_fifoltTgt??????sc_fifo_in_ifltTgt?sc_fifo_out_ifltTgt
  

37
sc_fifo_in_ifltTgt
template ltclass Tgt class sc_fifo_in_if virtual
public sc_interface public // blocking
read virtual void read( T ) 0 virtual
T read() 0 // non-blocking read
virtual bool nb_read( T ) 0 // get the
number of available samples virtual int
num_available() const 0 // get the data
written event virtual const sc_event
data_written_event() const 0
38
sc_fifo_out_ifltTgt
template ltclass Tgt class sc_fifo_out_if virtual
public sc_interface public // blocking
write virtual void write( const T ) 0
// non-blocking write virtual bool nb_write(
const T ) 0 // get the number of free
spaces virtual int num_free() const 0
// get the data read event virtual const
sc_event data_read_event() const 0
39
??sc_fifo???-??????FIFO??

• ??(Source)???(Sink)??FIFO???

40
????
class source public sc_module public
sc_in_clk clk sc_portltsc_fifo_out_ifltchargt gt
write_port SC_HAS_PROCESS(source) 
source(sc_module_name name)
sc_module(name) SC_CTHREAD(main,clk.neg())
  void main()//See in next slide
41
????
void sourcemain() int i0 const
char str "For any problems,feel free to
contact the author via Emailchenxiee
_at_mails.tsinghua.edu.cn!\n" wait()
while (true) if (rand() 1)
if (stri) write_port-gtwrite(stri)
wait()
42
????
include ltsystemc.hgt class sink public
sc_module public sc_in_clk clk
sc_portltsc_fifo_in_ifltchargt gt read_port
SC_HAS_PROCESS(sink)   sink(sc_module_name
name) sc_module(name)
SC_CTHREAD(main,clk.neg())   void
main() //See in next slice
43
????
void sinkmain() char c
while (true) if (rand() 1)
read_port-gtread(c) cout ltlt c
wait()
44
Top??
Top(sc_module_name name, int size)
sc_module(name) , fifo1("Fifo1", size) ,
source1("source1") ,
sink1("sink1"), clk("Clk",PERIOD,SC_NS)
//???????? source1.write_port(fifo1)
source1.clk(clk)
sink1.read_port(fifo1) sink1.clk(clk)

include "source.h" include "sink.h define
PERIOD 20 class Top public sc_module
public sc_clock clk sc_fifoltchargt
fifo1 source source1 sink sink1
45
sc_main( )
include ltsystemc.hgt include "tb.h" int sc_main
(int, char ) unsigned size 16 Top
Top1(Top1", size) cout ltlt"Testbench
started,the \
simulation result is" ltlt endl
sc_start(100000, SC_NS) coutltlt"\n"ltltendl
return 0
46
????????????????????

• ?????C???,??????????,??????????????

• ?????????????????,??????????????,?????????????????
  ????

• ????????????????,???????????????????

• ????,???????????????????????

47
???? - sc_semaphore

• ?????????

• ??????????????,??????????????????,??????????????(?
  ??????)??????????????????????????????????

• sc_semaphore????sc_semaphore_if?? ,??????

48
sc_semaphore_if

• class sc_semaphore_if virtual public
  sc_interface
• public
• // lock (take) the semaphore, block if not
  available
• virtual int wait() 0
• // lock (take) the semaphore, return -1 if
  not available
• virtual int trywait() 0
• // unlock (give) the semaphore
• virtual int post() 0
• // get the value of the semphore
• virtual int get_value() const 0

49
sc_semaphorewait()

• ??,wait()?????????,????????????????,????????,????
  ?????
• int sc_semaphorewait()
• while( in_use() ) sc_prim_channelwait(
  m_free )
• -- m_value
• return 0

50
sc_semaphore?????

• sc_semaphore( int init_value_ )
• sc_semaphore( const char name_, int init_value_
  )

51
sc_mutex

• ???????????? ????(?)??????????,??????????????,????
  ???????????

52
sc_mutex_if

• ????????sc_mutex_if ?

class sc_mutex_if virtual public
sc_interface public // blocks until mutex
could be locked virtual int lock() 0
// returns -1 if mutex could not be locked
virtual int trylock() 0 // returns -1 if
mutex was not locked by caller virtual int
unlock() 0
53
??????

• ??????,???????????????????????????????????????????
  ?????????????,??????????????

• ????????sc_mutex???????????

54
?????????
55
?????
SC_MODULE(mutex_example) sc_in_clk
clk sc_outltintgt data //Port to be protected
sc_mutex protect void writer1()
wait() while(true) protect.lock()
data.write(rand()) protect.unlo
ck() wait() //Other
Details of the design
56
?????????????

• ?????,????????
• ramltintgt ram0//????ram0
• void main_action()
• SC_CTOR(PortLess)
• SC_CTHREAD(main_action,clk.pos())
• ram0new ramltintgt("RAM", 0, 255)

57
?????????????
void PortLessmain_action() while(addresslte
nd_address) ram0-gtwrite(address,data)//?????????
??
//????? coutltlt"RAM write at address"ltltaddressltlt",
data \ is"ltltdataltltendl wait()
58
?????????

• ???????????????????,???sc_signalltTgt?????????,??sc_
  fifoltTgt???????????????????????????????????????????
  ???

• ????????????????(Formal Verification)

59
?????????

• ??????????????????????
• ?????????????????????,????sc_fifoltTgt??????????????
  ?????
• ??????????????,???????????????,????????????,??sc_s
  ignalltTgt??????????????????????????

60
?????????

• ??SystemC???,????????????,????????????????????????
  ????????????,?????????????????

61
???????????

• SystemC???????????????,???????register_port()???
  ?????????????????????????????? ?

• ???????????sc_fifoltTgt??????????????????
  register_port()?????

62
???????????
template ltclass Tgt Inline void
sc_fifoltTgtregister_port( sc_port_base
port_, const char if_typename_ )
sc_string nm( if_typename_ ) if( nm
typeid( sc_fifo_in_ifltTgt ).name() ) // only
one reader can be connected if( m_reader ! 0 )
//already has one reader SC_REPORT_ERROR(
SC_ID_MORE_THAN_ONE_FIFO_READER
_, 0 ) m_reader port_
63
????

• ??????????,??????,??????????,??????????????????

64
????

• ??????????
• ???????????????????,?????????????,????????????????
  ????,?????????
• ??????????????????,????????????????????????????,
  ??????????????,??????(composite
  channel)??????????????????

65
??????

• ?????????????????????????????

66
TLM FIFO????
class tlm_fifo public sc_module, public
sc_fifo_in_ifltTgt, public sc_fifo_out_ifltTgt,
public reset_if public sc_inltboolgt clk
//Other Signal Declaration //FIFO in
FIFO, rtl_fifo1 is an embedded channel
rtl_fifoltTgt rtl_fifo1//RTL FIFO private
unsigned m_size//actual size of FIFO public  
tlm_fifo(sc_module_name name, unsigned size)
sc_module(name), rtl_fifo1("rtl_fifo1",
size1),m_size(size) assert(m_sizegt0)
rtl_fifo1.clk(clk) rtl_fifo1.rst(rst)
//Other port assiciation
67
tlm_fifowrite(const T data)
virtual void tlm_fifowrite(const T data)
write_data data do wait(clk-gtposedge_e
vent()) while (full true)
wait(clk-gtposedge_event()) write_enable
true wait(clk-gtposedge_event())
write_enable false  
68
????

• ?????????????????????????????????????????????

• ?????????????GetFIFO_if,????????getWriteFIFO()????
  ??FIFO?????,?????????tlm_fifo???tlm_fifo,?????????
  ??GetFIFO??, data????????char???????Source????????
  ???????FIFO
• read_port-gtgetWriteFIFO()-gtwrite(data)

69
????

• ???????????????????,??????????????

70
????
71
????????

• ?C?,?????????????????????????????????,?????? ?

• ?????????Shape,??????????????????,??????????????Ci
  rcle??????Triangle?????

72
????????cont

• Shape?????,???????
• class Shape
• public
• virtual void rotate (int) 0
• virtual void draw (int) 0
• virtual void is_closed()0
• ???????0????????(??????,?????)?C??????????,??
  ?????????????,???????????
• Shape S //Shape????

Return