The MSP430 Instruction Set

1
The MSP430 Instruction Set
ECE 2560

• Department of Electrical and
• Computer Engineering
• The Ohio State University

2
The MSP 430 Instruction Set

• What is an Instruction Set
• The MSP 430 Instruction Set
• Instruction Formats
• Assemblers

3
Assembly Language

• Assembler Language Instructions
• The core instruction set of a processor
• Allow programming in pneumonics and symbols
  versus direct machine language.
• Assembler language instruction
• MOV R4,R3
• Machine language instruction
• 9A42
• 1 Assembler Instr ?? 1 Machine Instr
• A machine instruction specifies exactly what
  functions will be taken by the processor.
• Example move the contents of R1 to R2
• Decoded and causes generation of control signals
  that cause the movement of data

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The MSP430 Instruction Set

• Consists of 27 core instructions and 24 emulated
  instructions.
• Core instructions have unique op-codes
• Emulated instructions instructions made easier
  to write and read. When assembled they are
  replaced by the assembler with an equivalent core
  instruction.
• Note There is no code or performance penalty for
  using emulated instructions.
• See manual for instructions

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What is an assembler?

• It is a software program that has, as input,
  assembler language code and produces, as output,
  the machine language for a specific processor,
  i.e., the binary coding of instrcutions.
• Typically assemblers work with a group of
  processor targets in the same family.

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Core Instruction Formats

• Single operand
• Dual operand
• Jump
• Single and dual operand instructions can be byte
  or word instructions by using the .B or .W
  extension.
• Byte instructions used for byte data or byte
  peripherals
• Word instructions used for word data or word
  peripherals
• No .B or .W ? defaults to a word instruction

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Notation

• In instruction description
• src The source operand As and S-reg
• dst The destination operand Ad and D-reg
• As The addressing bits responsible for the
  addressing mode used for the source
• S-reg The register used for the source
• Ad The addressing bits used for the destination
• D-reg The register used for the destination
• Note on destination
• Destination addresses can be anywhere in the
  memory map, but they must be writeable to be
  effective.

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Double Operand Instructions

• The format of the two operand instruction is
• The fields are almost self explanatory
• The assembler language instruction looks like
• MOV src,dst

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Single Operand Instruction

• The format of the single operand instruction is
• Again, the fields are self explanatory
• Example
• SXT dst

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Jump Instruction

• The format of jump instructions is
• Modifies the Program Counter, PC, to alter
  control flow.
• Example
• JNE label
• label represents an
  address
• Action is to transfer execution to label if zero
  bit of condition code register set. Otherwise
  execution continues with the next instruction.

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The Program Counter

• The Program Counter always points to the memory
  location of the next instruction word to be
  fetched.
• Instructions are 1 to 3 words in length.
• As the PC points to words, the lsb is always 0.

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The instruction set

• The full instruction set is shown to the right.
• How to learn instruction set?
• Break down into groups

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Data movement

• The MOV instruction
• Moves data to and from memory (or an I/O port) to
  a destination.
• The source can use any addressing mode
• The destination can use any addressing mode.
• Addressing modes
• Register, immediate, absolute, indexed, symbolic,
  indirect register, indirect autoincrement

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The MOV instruction

• Examples of the move instruction
• Load a specific value into a register
• src use immediate mode
• dst use register mode
• MOV 024h,R9
• Set the contents of R9 to 0024
• MOV 6511h,R2
• Set the contents of R2 to 6511
• MOV(.B) is the only instruction for movement of
  data

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Arithmetic instructions

• ADC dst Add C to destination
• ADD src,dst Add source to destination
• ADDC src,dst Add source and C to destination
• DADC dst Add C to decimally to dst
• DADD src,dst Add src and C decimally to dst
• DEC dst Decrement destination
• DECD dst Double-decrement destination
• INC dst Increment destination
• INCD dst Double-increment destination
• SUB src,dst Subtract source from destination
• SUBC src,dst Subtract source and not(C) from
  dst
• SBC dst Subtract not(C) from destination
• All have .B mode for byte data

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Logical Instructions

• AND src,dst Logical AND source and destination
• INV dst Logical invert destination
• RLA dst Rotate left arithmetically
• RLC dst Rotate left through C
• RRA dst Rotate right arithmetically
• RRC dst Rotate right through C
• XOR src,dst Exclusive OR source and destination
• CLR dst Clear the destination to 0s
• ALL ABOVE HAVE .B to operate on byte data
• SWPB dst Swap bytes
• SXT dst Sign extend low byte through high byte

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Compare and Test

• CMP(.B) src,dst Compare source and destination
  
• TST(.B) dst Test destination
• BIT(.B) src,dst src and dst are logically
  ANDed
• N is msb, Z set if 0, C is NOT Z, V reset
• These instructions do not modify the contents of
  src or dst.
• They do however, set the bits of the condition
  code register (CC)
• Used to set bits for branching

18
Set and clear bits

• Masked set and clear - data
• BIC(.B) src,dst Clear bits in destination
• Result NOT.src AND dst -gt dst
• BIS(.B) src,dst Set bits in destination
• Result src OR dst -gt dst
• Set and clear bits of CC register
• CLRC Clear C SETC Set C
• CLRN Clear N SETN Set N
• CLRZ Clear Z SETZ Set Z

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Transfer of control flow

• Normal operation has the next instruction in
  memory executed next (PC2 or 3)
• Control flow instructions can modify were the
  next instruction is fetched from.
• The Jump instructions (conditional)
• JC/JHS label Jump if C set/Jump if higher or
  same
• JEQ/JZ label Jump if equal/Jump if Z set
• JGE label Jump if greater or equal
• JL label Jump if less
• JN label Jump is N set
• JNC/JLO label Jump if C not set/Jump if lower
• JNE/JNZ label Jump if not equal/Jump if Z not
  set
• Unconditional
• JMP label This is an unconditional jump
  ( (label)-gtPC )
• BR dst Branch to destination
  (dst-gt PC)

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Subroutine support

• Support for subroutine instrcutions
• CALL dst Call destintion
• ACTION
• SP-2 -gt SP, PC2-gt _at_SP, dst-gtPC
• RET Return from subroutine
• ACTION
• _at_SP-gt PC, SP2 -gt SP

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Stacks

• The stack an area of memory for storage of data
  accessed through the PUSH and POP instructions

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StacK instructions

• Two instructions
• PUSH(.B) src Push the source onto stack
• Action is SP-2-gt SP src-gt_at_SP
• POP(.B) dst Pop item from stack to
  destination
• Action is _at_SP-gt dst SP2 -gt SP
• Convention is that the stack grows down in memory
• The MSP430s SP points to TOS and valid data
• NOTE in some processor chips (microcontrollers
  and processors) the SP points to a free location
• ACTIONS to push and pop?

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Interrupts

• A pin on the MSP430 is the Non-Maskable Interrupt
  (NMI) input pin.
• Interrupts allow an external device to call for
  attention.
• The current instruction is completed and then the
  device is serviced.
• There are 3 instructions for managing this pin.

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Interrupt instructions

• Permitting and not permitting interrupts
• EINT Enable interrupts
• DINT Disable interrupts
• When an interrupt occurs, control flow is
  automatically transferred to the program that
  will deal with it. But first the PC and status
  register are pushed to the Stack.
• How to get back to where your program was at the
  time the interrupt occurred?
• RETI Return from interrupt
• Will pop the status register and PC from the
  Stack.

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The last instruction

• The final instruction in the instruction set is
• NOP No Operation

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Summary - Assignment

• The MSP 430 Users Guide has been added to the
  course webpage.
• The information in this lecture is a summary of
  the information of Table 3-17.
• Next Using CCS for assembler language
  programming. If you want to get a jump on this
  you can watch Dr. Khans 2560 screencast 07 and
  08.
• Quiz see web page
• Will cover some initial aspects of instruction
• Example Write the assembler instruction that
  will copy the contents of R4 to R8.