Status of the Powering Interlock system

1
Status of the Powering Interlock system

• Markus Zerlauth Bruno Puccio
• AB-CO-IN

2
Architecture
LHC Ref DB
PVSS Operator Console (in the Field Control Room
or CCC )
Ethernet Technical Network

PLC in non-radiation area
PIC
Profibus
Power Converter
Power Converter
QPS
PC_PERMIT
Power Converter
QPS
Power Converter
QPS
QPS
CIRCUIT_QUENCH
PC_FAST_ABORT
Remote I/O (close to clients)
POWERING_FAILURE

DISCHARGE_ REQUEST
PC_DISCHARGE_ REQUEST
ABORT
UPS
Beam Permit
Beam Interlock sys.
AUG
3
36 PICs for 28 Powering Subsectors, managing
1600 electrical circuits, using more than 1000
cables, handling 2400 interlock signals
4
PIC Racks in UA83
for A.L8
for X.L8
for M.L8
5
Hardware Commissioning planning for the PIC
Interlock team composed of only 3 people (Markus,
Robert Pierre)
Validation of commissioning performed via
automated procedures tools
Individual test of the PIC
PIC involved in short-circuits tests
Powering Tests
Additional resources still expected (time needed
for training of personnel)
6
Status of the different levels of the project
(1/3)

• Despite initial delay the activity is progressing
  well
• (thanks
  to Frederic Hervé)
• Lab tests are going to start soon
• ALARMS and PM have to be included
• 
  (discussions started, tbc)

PVSS layer
Ethernet Technical Network

7
Status of the different levels of the project
(2/3)
PVSS layer
Ethernet Technical Network

• PLC program is working and functionality tested
• Together with PVSS tests, communication tests to
  be started
• Worry about CPU module performance
• bug in the last version available on the market
  
• acknowledged from Siemens but no change before
  next generation (in 2006?)

Equipment layer CPU part

PIC
Profibus

8
Status of the different levels of the project
(3/3)
PVSS layer
Ethernet Technical Network
Equipment layer CPU part

PIC
Profibus
I/O part

• For the different boards, patch-panels,
  sub-units
• Prototypes validated
• Entering now in the pre-series phase
• all hardware foreseen for end of July
• Wiring and assembly will be made at CERN
• 
  (workshop and/or Interlock
  Team)

9
Summing-up

• Preparation in progress no show-stopper for the
  3 layers (PVSS side, Siemens CPU I/O parts)
• 2 PICs are going to commissioned in Sep.05
• 2 others PICs for the Arc 7-8 in Dec.05
• One more in UA83
• One in UJ76. Radiation issues gt system moved in
  TZ gallery?
• The units will be fully tested in the lab in
  August gt dismounted and re-mounted in the
  undergrounded area by the interlock Team.
• Dependencies issues?
• All copper cables (TS/EL) are already there
• 
  (check performed for LSS8L, and partially done in
  large part of LHC)
• UPS should be present in the racks (gttbc)
• Ethernet should be OK (gttbc)
• Remote Reset connection should be OK (gtGuy)

In conclusion (for the time being) we are
optimistic to be on time!