OUTLINE

1
Lecture 34

• OUTLINE
• The MOS Capacitor
• MOS non-idealities (cont.)
• VT adjustment
• Reading Chapter 18.3

2
Poly-Si Gate Depletion

• A heavily doped film of polycrystalline silicon
  (poly-Si) is typically employed as the
  gate-electrode material in modern MOS devices.
• There are practical limits to the electrically
  active dopant concentration (usually less than
  1x1020 cm-3)
• The gate must be considered as a semiconductor,
  rather than a metal

NMOS
PMOS
3
MOS Band Diagram with Gate Depletion
Si biased to inversion
WT
VG is effectively reduced
Ec
EFS
qfS
Ev
qVG
qVpoly
Ec
Ev
Wpoly
How can gate depletion be minimized?
P-type Si
N poly-Si gate
4
Gate Depletion Effect
Gausss Law dictates
e

qN
W
/
E
xo is effectively increased
poly
ox
ox
poly
N poly-Si
Cpoly
Cox
N
p-type Si
5
Example GDE
Vox , the voltage across a 2 nm thin oxide, is 1
V. The n poly-Si gate active dopant
concentration Npoly is 8 ?1019 cm-3 and the Si
substrate doping concentration NA is 1017cm-3.
Find (a) Wpoly , (b) Vpoly , and (c) VT .
Solution (a)


e
e
/
/
qN
x
V
qN
W
E
poly
o
ox
ox
poly
ox
ox
poly



-
14
V

1
)
F/cm
(
10
85
.
8
9
.
3

-
-
-





3
19
19
7
cm
10
8
C
10
6
.
1
cm
10
2

nm

3
.
1
6
(b)
(c)
Is the loss of 0.11V significant?
7
Inversion-Layer Thickness Tinv
The average inversion-layer location below the
Si/SiO2 interface is called the inversion-layer
thickness, Tinv .
Si
SiO2
poly-Si gate
-50
-40
-30
-20
-10
0
10
20
30
40
50
8
Effective Oxide Thickness, Toxe
at VGVdd
(VG VT)/Toxe can be shown to be the average
electric field in the inversion layer. Tinv of
holes is larger than that of electrons because of
the difference in effective masses.
9
Effective Oxide Capacitance, Coxe
C
Basic LF C-V
C
ox
with gate-depletion
with gate-depletion and
charge-layer thickness
data

V
G
10
VT Adjustment by Ion Implantation

• In modern IC fabrication processes, the threshold
  voltages of MOS transistors are adjusted by ion
  implantation
• A relatively small dose NI (units ions/cm2) of
  dopant atoms is implanted into the near-surface
  region of the semiconductor
• When the MOS device is biased in depletion or
  inversion, the implanted dopants add to the
  dopant-ion charge near the oxide-semiconductor
  interface.