Integrated Receivers for the SKA

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Integrated Receivers for the SKA

• Suzy Jackson (CSIRO ATNF Macquarie)

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Background

• Need for cheap receiver emerged from Luneburg
  Lens proposal.
• Project parameters developed in conjunction with
  Peter Hall (CSIRO/ISPO), Neil Weste (CISCO),
  Arnold van Ardenne (ASTRON) and Jeffrey Harrison
  (Macquarie).
• Development conducted as joint CSIRO/Macquarie
  PhD project.
• Currently unique international SKA project.

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Project Rationale

• Similar receiver requirements identified across
  all SKA proposals
• Large N small D one receiver per element
• Small N Large D many receivers per antenna
  (Focal Plane Array) to meet Field of View
  requirements.
• Cheap highly integrated receivers thus SKA
  enabling technology
• Generic prototype useful internationally across
  wide range of demonstrators SKAMP, NTD, EMBRACE

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CMOS for RF?

• Advantages
• High integration levels
• Low wafer costs
• Low power
• Ability to integrate digital logic
• Strong industry cost performance drivers
  (wireless networking, mobile phones)

• Detractors
• Lossy substrate poor quality passives
• Currently lower fT (higher noise) than GaAs InP
• Less mature technology (modelling issues)

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Noise Considerations
Deriving TN(min) for MOS transistors (Lee 1998)
TN(min) scales with fT. Newer processes promise
higher fT, hence lower noise at given frequency.
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CMOS Technology Trends
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Implying (Disclaimers Apply)
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Project Overview

• Design and construct 0.18µm RF-CMOS Integrated
  Receiver
• RF frequency range 500 1700 MHz.
• Tsys lt 50K (uncooled).
• Instantaneous IF bandwidth 500 MHz.
• 40dB (6 8 bits) dynamic range.
• Complete antenna to bits implementation.
• Ambitious specifications for CMOS technology.

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Block Diagram
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Some Results So Far

• LNA Using active noise cancelling for matching
  transistor (Bruccoleri 2004).

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Next Steps

• Design layout mixer, IF amps, IF filter,
  sampler as individual components.
• 1st wafer run end 2004.
• Integrate components.
• 2nd wafer run mid-late 2005.
• Final product 2006.