CSE 140 Lecture 14 System Design

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CSE 140 Lecture 14System Design

• CK Cheng
• CSE Dept.
• UC San Diego

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Design Process

• Describe system in programs
• Data subsystem
• List data operations
• Map operations to functional blocks
• Add interconnect for data transport
• Input control signals and output conditions
• Control Subsystem
• Derive the sequence according to the hardware
  program
• Create the sequential machine
• Input conditions and output control signals

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Example Multiplication

• Input X, Y
• Output Z
• Variable M, i
• M0
• For in-1 to 0
• If Yn-11, MMX
• Shift Y left by one bit
• If i ! 0, shift M left by one bit
• ZM

• Arithmetic
• ZX Y
• M0
• For in-1 to 0
• If Yi1, MMX 2i
• ZM

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Implementation Example
Multiply(X, Y, Z, start, done) Input X150,
Y150 type bit-vector, start type boolean
Local-Object A150, B150 ,M310, i40
type bit-vector Output Z310 type
bit-vector, done type boolean S0 If start
goto S0 done ?1 S1 A ? X B ? Y i?0
M?0 done ?0 S2 If B15 0 goto S4
i?i1 S3 M ? MA S4 if igt 16, goto S6 S5
M?Shift(M,L,1) B?Shift(B,L,1) goto S2 S6
Z?M done? 1 goto S0
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Step 0 Syntax
S1 A ? X B ? Y i?0 M?0 done ? 0 S2
If B15 0 goto S4 i?i1 S3 M ? MA S5
M?Shift(M,L,1) B?Shift(B,L,1) goto S2 S6
Z?M done? 1 goto S0
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Step 0 Syntax
Multiply(X, Y, Z, start, done) Input X150,
Y150 type bit-vector, start type boolean
Local-Object A150, B150 ,M310, i40
type bit-vector Output Z310 type
bit-vector, done type boolean S0 If start
goto S0 done ?1 S1 A ? X B ? Y i?0
M?0 done ?0 S2 If B15 0 goto S4
i?i1 S3 M ? MA S4 if igt 16, goto S6 S5
M?Shift(M,L,1) B?Shift(B,L,1) goto S2 S6
Z?M done? 1 goto S0
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Step 1 Identify Input and Output of data and
control subsystems
ZXY
Multiply(X, Y, Z, start, done) Input
X150, Y150 type bit-vector,
start type boolean Local-Object A150,
B150 ,M310,
i40 type bit-vector Output Z310 type
bit-vector, done type boolean S0
If start goto S0 done ?1 S1 A ? X B ? Y
i?0 M?0 done ?0 S2 If B15 0 goto S4
i?i1 S3 M ? MA S4 if igt 16, goto
S6 S5 M?Shift(M,L,1) B?Shift(B,L,1) goto
S2 S6 Z?M done? 1 goto S0
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Step 2 Identify Condition Bits to Control
Subsystem
Multiply(X, Y, Z, start, done) Input
X150, Y150 type bit-vector,
start type boolean Local-Object A150,
B150 ,M310,
i40 type bit-vector Output Z310 type
bit-vector, done type boolean S0
If start goto S0 done ? 1 S1 A ? X B? Y
i? 0 M? 0 done ? 0 S2 If B15 0 goto
S4 i? i1 S3 M ? MA S4 if igt 16, goto
S6 S5 M? Shift(M,L,1) B? Shift(B,L,1) goto
S2 S6 Z? M done? 1 goto S0
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Step 3 Identify Data Subsystem Operations
ZXY
Multiply(X, Y, Z, start, done) Input
X150, Y150 type bit-vector,
start type boolean Local-Object A150,
B150 ,M310,
i40 type bit-vector Output Z310 type
bit-vector, done type boolean S0
If start goto S0 done ?1 S1 A ? X B ? Y
i?0 M?0 done ?0 S2 If B15 0 goto S4
i?i1 S3 M ? MA S4 if igt 16, goto
S6 S5 M?Shift(M,L,1) B?Shift(B,L,1) goto
S2 S6 Z?M done? 1 goto S0
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Step 3 Identify Data Subsystem Operations
Multiply(X, Y, Z, start, done) Input
X150, Y150 type bit-vector,
start type boolean Local-Object A150,
B150 ,M310,
i40 type bit-vector Output Z310 type
bit-vector, done type boolean S0
If start goto S0 done ?1 S1 A ? X B ? Y
i?0 M?0 done ? 0 S2 If B15 0 goto S4
i?i1 S3 M ? MA S4 if igt 16, goto
S6 S5 M?Shift(M,L,1) B?Shift(B,L,1) goto
S2 S6 Z? M done? 1 goto S0
ZXY
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Step 4 Map Data Operations to Implementable
functions
Multiply(X, Y, Z, start, done) Input
X150, Y150 type bit-vector,
start type boolean Local-Object A150,
B150 ,M310,
i40 type bit-vector Output Z310 type
bit-vector, done type boolean S0
If start goto S0 done?1 S1 A ? X B ? Y
i?0 M?0 done ? 0 S2 If B15 0 goto S4
i?i1 S3 M ? MA S4 if igt 16, goto
S6 S5 M?Shift(M,L,1) B?Shift(B,L,1) goto
S2 S6 Z? M done? 1 goto S0
operation A ? Load (X) B ? Load (Y) M?
Clear(M) i? Clear(i) i ? INC(i) M? Add(M,A) M ?
SHL(M) B ? SHL(B) Wires
A ? X B ?Y M?0 i?0 i?i 1 M?MA M?Shift(M,L,1) B?S
hift(B,L,1) Z?M
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Implementing the data subsystem
Registers If C then R ? D
operation A ? Load (X) B ? Load (Y) M?
Clear(M) i? Clear(i) i ? INC(i) M? Add(M,A) M ?
SHL(M) B ? SHL(B)
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Storage Component Registers with control signals
Registers If C then R ? D
operation A ? Load (X) B ? Load (Y) M?
Clear(M) i? Clear(i) i ? INC(i) M? Add(M,A) M ?
SHL(M) B ? SHL(B)
Register B
16
Y
R
D
LD
B15
C2
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Function Modules Adder, Shifter
M? Add(M,A) M? SHL(M)
Adder
Selector
A
operation A ? Load (X) B ? Load (Y) M?
Clear(M) i? Clear(i) i ? INC(i) M? Add(M,A) M ?
SHL(M) B ? SHL(B) Wires
S
0 1
B
LD
ltlt SHL
C1
C8
B
B15
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Function Modules Adder, Shifter
operation A ? Load (X) B ? Load (Y) M?
Clear(M) i? Clear(i) i ? INC(i) M? Add(M,A) M ?
SHL(M) B ? SHL(B)
Adder
A
Selector
S
0 1
B
LD
ltlt SHL
C1
C8
Selector
Register B
16
Y
0 1
B
B15
R
D
ltlt SHL
LD
C9
C2
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Function Modules Adder, Shifter
operation A ? Load (X) B ? Load (Y) M?
Clear(M) i? Clear(i) i ? INC(i) M? Add(M,A) M ?
SHL(M) B ? SHL(B)
Adder
A
Selector
S
0 1
B
LD
ltlt SHL
C1
C8
Selector
Register B
16
Y
0 1
B
B15
R
D
ltlt SHL
LD
C9
C2
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Step 6 Map Control Signals to Operations
control C0 C20 and C9 1 C4 C6 C7 C10 and
C81 C11 and C81 C21 and C9 1
operation A ? Load (X) B ? Load (Y) M?
Clear(M) i? Clear(i) i ? INC(i) M? Add(M,A) M ?
SHL(M) B ? SHL(B)
Adder
A
Selector
S
0 1
B
LD
ltlt SHL
C1
C8
Selector
Register B
16
Y
0 1
B
B15
R
D
ltlt SHL
LD
C9
C2
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Step 7 Identify Control Path Components
ZXY
Multiply(X, Y, Z, start, done) Input
X150, Y150 type bit-vector,
start type boolean Local-Object A150,
B150 ,M310,
i40 type bit-vector Output Z310 type
bit-vector, done type boolean S0
If start goto S0 done?1 S1 A? X B ?Y
i?0 M?0 done ?0 S2 If B15 0 goto S4
i?i1 S3 M ?MA S4 if igt 16, goto S6 S5
M?Shift(M,L,1) B?Shift(B,L,1) goto S2 S6
Z?M done?1 goto S0
B15, i4
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B15, i4
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• PI Q Which of the following can be used to
  sequence the order of computation of our
  algorithm
• A sequencer
• A finite state machine
• A combinational circuit

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• PI Q Which of the following can be used to
  sequence the order of computation of our
  algorithm
• A sequencer
• A finite state machine
• A combinational circuit

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Design of the Control Subsystem
Multiply(X, Y, Z, start, done) S0 If start
goto S0 done?1 S1 A? X B ?Y i?0 M?0
done ?0 S2 If B15 0 goto S4 i?i1 S3
M ?MA S4 if igt 16, goto S6 S5
M?Shift(M,L,1) B?Shift(B,L,1) goto S2 S6
Z?M done?1 goto S0
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Control Subsystem
Multiply(X, Y, Z, start, done) S0 If start
goto S0 done?1 S1 A? X B ?Y i?0 M?0
done ?0 S2 If B15 0 goto S4 i?i1 S3
M ?MA S4 if igt 16, goto S6 S5
M?Shift(M,L,1) B?Shift(B,L,1) goto S2 S6
Z?M done?1 goto S0
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One-Hot State Machine
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Control Subsystem
Multiply(X, Y, Z, start, done) S0 If start
goto S0 done?1 S1 A? X B ?Y i?0 M?0
done ?0 S2 If B15 0 goto S4 i?i1 S3
M ?MA S4 if igt 16, goto S6 S5
M?Shift(M,L,1) B?Shift(B,L,1) goto S2 S6
Z?M done?1 goto S0
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One-Hot State Machine
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One-Hot State Machine
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One-Hot State Machine
S0
start
start
S1
S6
S2
B15
B15
i4
S5
S4
S3
i4
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Control Subsystem One-Hot State Machine Design

• Input State Diagram
• Use a flip flop to replace each state.
• Set the flip flop which corresponds to the
  initial state and reset the rest flip flops.
• Use an OR gate to collect all inward edges.
• Use a Demux to distribute the outward edges.

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Data Subsystem
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Multiply(X, Y, Z, start, done) S0 If start
goto S0 done?1 S1 A? X B ?Y i?0 M?0
done ?0 S2 If B15 0 goto S4 i?i1 S3
M ?MA S4 if igt 16, goto S6 S5
M?Shift(M,L,1) B?Shift(B,L,1) goto S2 S6
Z?M done?1 goto S0
control C0 C20 and C9 1 C4 C6 C7 C10 and
C81 C11 and C81 C21 and C9 1
operation A ? Load (X) B ? Load (Y) M?
Clear(M) i? Clear(i) i ? INC(i) M? Add(M,A) M ?
SHL(M) B ? SHL(B)
C0 C1 (mux) C2 (mux) C4 C6 C7 C8 C9 done
S0 0 X X 0 0 0 0 0 1
S1 1 X 0 1 1 0 0 1 0
S2 0 X X 0 0 1 0 0 0
S3 0 0 X 0 0 0 1 0 0
S4 0 X X 0 0 0 0 0 0
S5 0 1 1 0 0 0 1 1 0
S6 0 X X 0 0 0 0 0 1
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Implementing the output logic of Control Subsystem
C0 C1 (mux) C2 (mux) C4 C6 C7 C8 C9 done
S0 0 X X 0 0 0 0 0 1
S1 1 X 0 1 1 0 0 1 0
S2 0 X X 0 0 1 0 0 0
S3 0 0 X 0 0 0 1 0 0
S4 0 X X 0 0 0 0 0 0
S5 0 1 1 0 0 0 1 1 0
S6 0 X X 0 0 0 0 0 1
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One-Hot State Machine
S0
start
start
S1
S6
S2
B15
B15
i4
S5
S4
S3
i4
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Implementation Example
Given a hardware program, implement data path and
control subsystems
Input X70, Y70 type bit-vector, start
type boolean Local-Object A70, B70 type
bit-vector Output Z70 type
bit-vector, done type boolean Wait If start
goto Wait S1 A ?X B ?Y done ?0
S2 If B gt 0 goto S4 S3 B ?-B S4 If
A gt B goto S6 S5 A ?A 1 B ?B-1
goto S4 S6 Z ?4 A done ?1 goto
Wait
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Step 1 Identify Input and Output of data and
control subsystems
Some_function Input X70, Y70 type
bit-vector, start type boolean Local-Object
A70, B70 type bit-vector Output Z70
type bit-vector, done type boolean Wait If
start goto Wait S1 A ?X B ?Y done
?0 S2 If B gt 0 goto S4 S3 B ?-B
S4 If A gt B goto S6 S5 A ?A 1 B ?B-1
goto S4 S6 Z ?4 A done ?1 goto
Wait
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Step 2 Identify Data Subsystem Operations
Some_function Input X70, Y70 type
bit-vector, start type boolean Local-Object
A70, B70 type bit-vector Output Z70
type bit-vector, done type boolean Wait If
start goto Wait S1 A ?X B ?Y done
?0 S2 If B gt 0 goto S4 S3 B ?-B
S4 If A gt B goto S6 S5 A ?A 1 B ?B-1
goto S4 S6 Z ?4 A done ?1 goto
Wait
4 Ceiling (X Y )/ 2 if Xlt Y 4X otherwise
Z
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Step 2 Identify Data Subsystem Operations
Some_function Input X70, Y70 type
bit-vector, start type boolean Local-Object
A70, B70 type bit-vector Output Z70
type bit-vector, done type boolean Wait If
start goto Wait S1 A ?X B ? Y done lt
0 S2 If B gt 0 goto S4 S3 B ? -B
S4 If A gt B goto S6 S5 A ? A 1 B?
B-1 goto S4 S6 Z ? 4 A done ? 1
goto Wait
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Step 2 Map Data Operations to Implementable
functions
Input X70, Y70 type bit-vector, start
type boolean Local-Object A70, B70 type
bit-vector Output Z70 type
bit-vector, done type boolean Wait If start
goto Wait S1 A ?X B ?Y done lt 0
S2 If B gt 0 goto S4 S3 B ?-B S4 If
A gt B goto S6 S5 A ?A 1 B ? B-1
goto S4 S6 Z ? 4 A done ? 1 goto
Wait
operation A ? Load (X) B ? Load (Y) B ? CS
(B) Comp (A, B) A ? INC (A) B ? DEC (B) Z ? SHL(A)
A ? X B ? Y B ? -B A gt B A ? A 1 B ? B 1 Z ?
4A
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Step 3 Tag each Data Operations with a Control
Signal
operation A ? Load (X) B ? Load (Y) B ? CS
(B) Comp (A, B) A ? INC (A) B ? DEC (B) Z ? SHL(A)
A ? X B ? Y B ? -B A gt B A ? A 1 B ? B 1 Z ?
4A
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Step 4 Identify Condition Bits to Control
Subsystem
Input X70, Y70 type bit-vector, start
type boolean Local-Object A70, B70 type
bit-vector Output Z70 type
bit-vector, done type boolean Wait If start
goto Wait S1 A ? X B ? Y done ? 0
S2 If B gt 0 goto S4 S3 B ? -B S4 If
A gt B goto S6 S5 A ? A 1 B ? B-1
goto S4 S6 Z ? 4 A done? 1 goto
Wait
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Step 5 Implement the Data Subsystem from
Standard Modules
operation A ? Load (X) B ? Load (Y) B ? CS
(B) Comp (A, B) A ? INC (A) B ? DEC (B) Z ? SHL(A)
Register B
8
Y
R
D
LD
B7
C2
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Step 5 Implement the Data Subsystem from
Standard Modules
operation A ? Load (X) B ? Load (Y) B ? CS
(B) Comp (A, B) A ? INC (A) B ? DEC (B) Z ? SHL(A)
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CS
DEC
B
Y
Z
Comp
C2
C3
C5
C1
C4
C6
C7
X
A
Control Unit
C1
C2
C3
INC
C4
B7
C5
C6
start
C7
done
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Designing the control unit
S0 S1 S2 S3 S4 S5 S6 S7 S8
If start, goto S0, else goto S1 A ? X B ? Y
done ? 0 goto S2 If Blt7gt goto S4, else
goto S3 B ? CS (B), goto S4 If k goto S6, else
goto S5 A ? INC (A), B ? DEC (B), goto S4 Z ? A
goto S7 Z ? SHL (z), goto S8 Z ? SHL (z), done 1,
goto S0
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State Machine
S0
start
start
S1
S8
S2
S7
B7
B7
S6
S3
k
k
S4
S5
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One-Hot State Machine
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Summary

• Hardware Allocation
• Balance between cost and performance
• Resource Sharing and Binding
• Map operations to hardware
• Interconnect Synthesis
• Convey signal transports
• Operation Scheduling
• Sequence the process

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• Remarks
• Implement the control subsystem with one-hot
  state machine design.
• Try to reduce the latency of the whole system.