Status Report of the ROD Testing at BNL - PowerPoint PPT Presentation

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Status Report of the ROD Testing at BNL

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Status Report of the ROD Testing at BNL Activity update of the ROD system at BNL: DAQ-1 with trigger controller Data corruption testing calibration etc. – PowerPoint PPT presentation

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Title: Status Report of the ROD Testing at BNL


1
Status Report of the ROD Testing at BNL
  • Activity update of the ROD system at BNL
  • DAQ-1 with trigger controller
  • Data corruption testing
  • calibration etc.
  • Kin Yip

2
DAQ at BNL, too
1
  • Started from the setup of L. Monetas, and with
    additional help from M. Caprini, K. Serguei and
    R. Jones
  • Quite a bit of work to install and set up in a
    non-CERN software environment ( slackware etc.)
  • I have also tackled some synchronization problem
    which may hang the system occassionally, with
    help from K. Serguei et al.
  • NEW(!) Trigger Controller, according to M.
    Caprini, the first controller to be used for
    calibration and trigger control.
  • Demonstrated to people in Atlas week at BNL and
    US Atlas review

3
Two controllers in two different crates
4
(No Transcript)
5
Controlling trigger rate
6
Issues related to data integrity
2
  • SDRAM After a couple newer versions of OC FPGA
    firmware from Daniel, we can now write to 8
    Mbytes without data corruption
  • EOE flag doesnt seem to come up at trigger rate
    gt11.1 kHz
  • VME read errors at high trigger rate are still
    there
  • A recent and different kind of data corruption
    (eg. the error bits are wrong)
  • If rebooted, the data read from the FEB through
    the optical link seemed to be OK for a little
    while and then went crazy again
  • This probably didnt happen so regularly before
    in the last several months

7
Issues related to data integrity (cont.)
2
  • There is a jumper in the GLink Receiver card
    which be used to control the phase between the
    data and clock
  • But adjusting the jumper position didnt solve
    the problem
  • After a lot of detective work, the problem is
    found to be due to the fact that the temperature
    at the back of the VME crate is too high
  • Temperature gt 60o C ( with poor A/C in the lab.)
    for the Glink chip
  • There didnt seem to have this problem in the
    winter
  • GLink chips have malfunctioned such that the
    phase between the data and clock would shift ?
    corrupted data (including wrong error codes)
  • Solution
  • I put a small fan blowing air right towards the
    Glink receiver card
  • Temperature drops and the phase doesnt change
    any more, which one can see even in a scope !

8
Pulse from the trigger analyzer board
Thermometer
9
Calibration and miscellaneous
3
  • Regularly using a calibration board (LAPP) to
    inject signals to FEB ? ROD, as part of the data
    chain
  • See the plot
  • Making a small board to veto trigger on BUSY
  • Progress in (DSP) calibration codes in SMU, Texas
  • Installed TI's code composer studio v1.20
    (Windows) but couldnt produce an executable to
    run DSP correctly
  • Technology (software) transferred to Jose M.
    Castelo to set up the ROD for TileCal

10
Pulse from the trigger analyzer board
Data seen from the ROD using 1 calibration channel
11
Plans
  • Further optimize the DAQ system and extend the
    trigger controller with more functionalities (?)
  • To be really used for doing calibration with the
    read-out chain of the BNL LAr electronics mock-up
  • Hope to have and use more sophisticated
    calibration codes in the DSP from SMU soon
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