Detecting elements for the CALICE MAPS design - PowerPoint PPT Presentation

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Detecting elements for the CALICE MAPS design

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Title: Slide 1 Author: ks57 Last modified by: Konstantin Stefanov Created Date: 12/3/2004 1:52:44 PM Document presentation format: On-screen Show Company – PowerPoint PPT presentation

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Title: Detecting elements for the CALICE MAPS design


1
Questions
  • Detecting elements for the CALICE MAPS design
  • How does the collected charge depend on
  • Diode size?
  • Diode position with respect to the NWELL?
  • Diode bias voltage?

2
Setup
  • The NWELL is 3 µm wide
  • Diode size and position are variable
  • The location of the MIP track is also variable
  • The finite length of this structure does not
    allow full charge collection some error is
    introduced

Dx
Dw
Diodes VD
NWELL 3.3V
MIP track
reflected charge
substrate (p)
0
X
25 ?m
50 ?m
3
Question 1 - Diode size
  • The MIP hits at X from the NWELL centre
  • Diode size Dw is variable, Dx 12 µm

4
Question 2 - Diode position with respect to the
NWELL
  • The MIP hits the centre of the NWELL (X0)
  • Diode size Dw and their distance from the NWELL
    Dx are variable

5
Question 3 - Diode bias voltage
  • The MIP hits at distance 8 µm from centre of the
    NWELL
  • Diode size Dw and bias are variable, distance
    from the NWELL Dx is fixed to 12 µm

6
A movie speaks more than 1000 words
  • The MIP hits at distance 8 µm from the NWELL
    centre
  • Diode size Dw 4 µm, 12 µm from the NWELL centre

Click to start/stop
Depletion regions under the diodes are ?3 µm
deep. This is clearly visible as the electron
density in the depleted regions is small (charge
is transported very quickly there seen as
liquid flow)
7
Conclusions
  • Surprisingly, increasing the diode size does not
    proportionally improve the collection efficiency
  • Should the effect be much stronger in 3D (
    (Dw)2 rather than Dw)?
  • Very important to verify in 3D
  • Placing the diodes next to the NWELL has some
    effect on reducing the charge loss
  • Diode bias voltage is minor effect
  • This is not a substitute for proper 3D
    simulation similar to Giulios
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