Authors: Mircea R. Stan, Alexandre F. Tenca and Milos D. Ercegovac

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Long and Fast Up/Down Counters
Authors Mircea R. Stan, Alexandre F. Tenca and
Milos D. Ercegovac
Reader Pushpinder Kaur Chouhan
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Long and Fast Up/Down Counters

• Introduction
• Basic Counters
• Counters Classification
• Prescaled Counters
• Constant-Time Up/down Counters
• Alternative Design
• Conclusion
• References

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Long and Fast Up/Down Counters

• Introduction
• Definition of counter
• What is the article about
• Basic Counters
• Counters Classification
• Prescaled Counters
• Constant-Time Up/down Counters
• Alternative Design
• Conclusion
• References

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Introduction

• Counter is a special type of adder in which one
  operand is kept constant.
• Mod number number of states 2n in a counter (n
  is number of flip-flops)
• Generally counter can be written as Binary modulo
  2n n-bit counter, where the value s(t) of the
  counter is incremented by one in each clock
  cycle
• 
  s(t1) s(t) mod 2n

In Out Up/Down Load CNT Reset
CLK TC
N
N
Black-box generic counter model with the most
common control signals
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Introduction

• Problem- When the up/down counter changes
  direction from counting up to counting down or
  vise versa.
• Solution-
• use Shadow register for storing the previous
  counter state.
• restore the previous state in constant time, by
  storing the carry bits in a Carry/Borrow
  register.

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Long and Fast Up/Down Counters

• Introduction
• Basic Counters
• Asynchronous Counter
• Synchronous Counter
• Synchronous Decade Counter
• Ring Counter
• Twisted-ring Counter
• Counters Classification
• Prescaled Counters
• Constant-Time Up/down Counters
• Alternative Design
• Conclusion
• References

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Basic Counters

• Asynchronous Counter

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Basic Counters

• Asynchronous up/down Counter

Sequence Table -
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Basic Counters

• Synchronous Counter

Synchronous up/down Counter
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Basic Counters
Asynchronous Decade Counter
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Basic Counters

• Ring Counter

D Q3 CLK Q3
D Q2 CLK Q2
D Q1 CLK Q1
D Q0 CLK Q0
Q3
Q2
Q1
Q0
1000 0100 0010 0001
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Basic Counters

• Twisted-ring Counter

D Q2 CLK Q2
D Q1 CLK Q1
D Q0 CLK Q0
Q2
Q1
Q0
000 100 110 111
011 001
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Long and Fast Up/Down Counters

• Introduction
• Basic Counters
• Counters Classification
• Based on initialization of the state
• Based on counting sequence
• Based on the way of supplying the clock signal
• Based on the state diagram
• Based on the number of states
• Based on the state encoding
• Prescaled Counters
• Constant-Time Up/down Counters
• Alternative Design
• Conclusion
• References

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Counters Classification

• Based on initialization of the state
• Noninitalizable
• Resettable
• Loadable
• Based on counting sequence
• Up-only
• Down-only
• Up/down
• Based on the way of supplying the clock signal
• Asynchronous
• Semisynchronous
• Synchronous
• Based on the state diagram
• Periodic
• Aperiodic

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Counters Classification

• Based on initialization of the state
• Based on counting sequence
• Based on the way of supplying the clock signal
• Based on the state diagram
• Based on the number of states
• Modulo-2N
• Modulo-P
• Based on the state encoding
• Binary
• Quasi-Binary
• Non-Binary

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Long and Fast Up/Down Counters

• Introduction
• Basic Counters
• Counters Classification
• Prescaled Counters
• Characteristics
• Basic idea
• Block Diagram
• Partitioning
• Constant-Time Up/down Counters
• Alternative Design
• Conclusion

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Prescaled Counter

• Characteristics
• Binary counting sequence
• Clock period independent of counter size
• Readable on the fly
• Space complexity linear in the number of bits
  i.e., (O(N))
• Count up, down, or up/down
• Resettable

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Prescaled Counter

• Basic Idea Characteristic of binary number
  system. i.e., The higher order bits are stable
  for long periods of time and the terminal count
  (TC) output from the two least significant bits,
  which becomes a CARRY-in into the most
  significant block, is periodic with a lower
  frequency than the clock signal.

Binary Sequence Counting Up
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Prescaled Counter
Prescaling long counters requires partitioning
them into a series of sub-blocks of increasing
sizes in order to take advantage of the reduced
frequency required by high order bits.
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Prescaled Counter

• Partitioning methods -
• Top-down manner First determine the size of
  most significant block, which is chosen as large
  as possible and then recursively determine the
  size of the lower order blocks. N-bit counter is
  first partitioned into an (N - log2N ) most
  significant block and into another log2N block.
  Eg- 64-bit counter is partitioned in block sizes
  58, 3, 2, 1 and 128-bit counter in 121, 4, 2, 1.
• Bottom-up manner - First determine the size of
  least significant block, then choose the second
  block as large as possible and then the third and
  so on. Least significant block with n0 1-bit
  the second block with n1 2 to the power n0
  2-bits and the third block with n2 2 the power
  (n0 n1) 8 bits and so on. Eg- 64-bit
  counter is partitioned in block sizes 51, 8, 2, 1
  and 128-bit counter in 117, 8, 2, 1.

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Long and Fast Up/Down Counters

• Introduction
• Basic Counters
• Counters Classification
• Prescaled Counters
• Constant-Time Up/down Counters
• Main idea
• Block Diagram
• Least-Significant Bit Counter
• Configuration Bit
• Clock Period
• Up/Down Ring Counter
• Partitioning
• Incrementer/Decrementer
• Alternative Design
• Conclusion

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Constant-Time Up/down Counters

• Main idea - Store the previous block value in
  the Shadow register whenever the block is loaded
  with a new value and simply load this value when
  necessary, instead of trying to compute it.
• Issues that determine the structure of the new
  counter
• The prescaled TC generation must itself be
  up/down, for that up/down ring counter is used.
• Each block needs to be configurable for counting
  either up or down. A separate configuration bit
  for each block is needed to keep track of the
  block configuration.
• Each sub-block has a shadow register that stores
  the previous block value. When the block
  configuration is up, the shadow register stores
  the present value minus one LSB and when the
  configuration is down, it stores the present
  value plus one LSB.

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Constant-Time Up/down Counters
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Partitioning

• Determining the partition sizes for the
  proposed up/down counter proceeds top-down, the
  minimum clock period (Tclk) is larger than the
  combinational unit delay due to the extra
  complexity. If we consider Tclk pd, where d is
  the unit delay, the partitioning first divides
  the N-bit counter into a most significant N -
  (log2 N/P) block and into another (log2 N/P)
  block which is recursively divided in the same
  manner until the smaller block is a 1-bit
  counter.
• Example For p 4 and N 64, the
  partitioning leads to the sizes 60, 3, 1.

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Up/Down Ring Counter

• The ring counter inside each block is used to
  generate the TC in constant time for the block.
• When counting up, TC1 when the state of the
  enable counter is s(t)10000
• When counting down, TC1 when the state of the
  enable counter is s(t)00000

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Incrementer/decrementer
Incrementer/decrementer can be easily implemented
as a ripple carry chain. For an n-bit block, the
delay through the ripple chain will be n times
the unit logic delay.
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Least-Significant Bit Counter

• A 1- bit counter counts in the same sequence, so
  it does not effect whether it count up or
  down.
• It act as both 1-bit least significant bit and
  as a ring counter for the second block.
• There is no need for a shadow register or
  configuration bit for the first block.

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Configuration Bit

• A configuration bit for each higher order block
  keeps track of how the block is configured
  (up/down). There are four cases
• Block is configured up and a carry-in comes from
  ring counter.
• Block is configured down and a borrow-in comes
  from ring counter.
• Block is configured up and a borrow-in comes
  from ring counter.
• Block is configured down and a carry-in comes
  from ring counter.

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Example- 64bit ( 60,3,1)
Up/ down TC-in (RC) Configuration bit Increase/ decrease Swap signal Shadow register Register LSB counter
(1) up carry up inc 0 001 010 0
(4) down carry up - 1 010 001 1
up carry up inc 0 001 010 0
up carry up inc 0 010 011 1
(3) up borow down - 1 011 010 0
(2) down borow down dec 0 010 001 1
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Constant-Time Up/down Counters
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Long and Fast Up/Down Counters

• Introduction
• Basic Counters
• Counters Classification
• Prescaled Counters
• Constant-Time Up/down Counters
• Alternative Design
• Use of Carry/Borrow Register
• Conclusion
• Comment
• References

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Alternative Design

• Store the bit-wise XOR between the previous
  state and the current state in a Carry/Borrow
  register. With this information available, it is
  possible to restore the desired previous state in
  one gate delay.

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Long and Fast Up/Down Counters

• Introduction
• Basic Counters
• Counters Classification
• Prescaled Counters
• Constant-Time Up/down Counters
• Alternative Design
• Conclusion
• Comment
• References

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Conclusion

• Use Shadow register to store the previous value
  of the counter and just swap the value when
  counter change the direction.
• Use the Carry/Borrow register to store the
  bit-wise XOR between the previous state and
  current state.
• Use of shadow register is better than the
  carry/borrow register, as CBreg restore the value
  in one gate delay.

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Long and Fast Up/Down Counters

• Introduction
• Basic Counters
• Counters Classification
• Prescaled Counters
• Constant-Time Up/down Counters
• Alternative Design
• Conclusion
• Comment
• References

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Comment

• Use twisted-ring counter instead of ring counter
  in constant up/down counter with shadow register
  will be fast and may use less clock period.
• Mod-N Twisted-ring counter can be constructed by
  connecting N/2 flip-flops, where as in Mod-N ring
  counter N flip-flops are required.
• We can use Bottom-up manner partitioning, as in
  top-down manner partitioning the counters of
  different sizes will require different partition
  sizes.
• The state bits in the twisted-ring counter are
  such that the s(t)(1000) state can be detected
  by the two most significant bits and the
  s(t)(0000) state can be detected by testing the
  most and least significant bits.

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Up/Down Twisted-ring Counter
000 100 110 111
011 001
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Long and Fast Up/Down Counters

• Introduction
• Basic Counters
• Counters Classification
• Prescaled Counters
• Constant-Time Up/down Counters
• Alternative Design
• Conclusion
• Comment
• References

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References

• Digital Systems Principles and Application By
  Ronald J. Tocci.
• Computer Arithmetic Algorithms and Hardware
  Designs By Behrooz Parhami
• http//www.play-hookey.com/digital/synchronous
  counter.html
• http//www.eelab.usyd.edu.au/digital_tutorial/part
  2/counter01.html
• http//www.hcc.hawaii.edu/richardi/113/index.htm

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Questions ?
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Basic Counters
Synchronous Decade Counter

• Q0 toggles on each clock pulse.
• Q1 changes on the next clock pulse each time
  Q01 and Q30.
• Q2 changes on the next clock pulse each time
  Q0Q11.
• Q3 changes on the next clock pulse each time
  Q01, Q11 and Q21 (count 7), or when Q01 and
  Q31 (count 9).

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Basic Counters
Differential Counter -
? k (d1-d2)