Figure 1

1
Figure 1
Emulation System
PC
SOC RTL
Display
Memory Embedded SOC Software
Protocol Interface
MMC
Terminal
Keypad
Transactor C Interface
Transactor HW Interface
Protocol Interface
Terminal
Transactor HW Interface
Transactor C Interface
Protocol Interface
Display
Transactor HW Interface
Transactor C Interface
Protocol Interface
Camera
Camera
Transactor HW Interface
Transactor C Interface
Protocol Interface
Keypad
Transactor HW Interface
USB
Ethernet
Transactor C Interface
Protocol Interface
USB
Transactor HW Interface
Transactor C Interface
Protocol Interface
Ethernet
Transactor HW Interface
Audio
Transactor C Interface
Protocol Interface
Audio
Files
Transactor HW Interface
Transactor C Interface
Protocol Interface
I/O Files
Software Test Environment
Interface Hardware
SoC Prototype
2
Figure 2
ZeBu HW/SW Co-Verification Platform
ZeBu Compilation Flow
PC / Linux
ZeBu
PCI I/F
Test Environment
DUT RTL
DUT Logic Emulation Resources Up to
64 Xilinx V2-8000
Memory Server
Clock Server
Cycle-Based
Verilog/VHDL
FPGA Synthesis
ASIC Synthesis
C/C
SystemC Signals
Reconfigurable Test Bench (RTB)
ZeBu Compiler
DUT Compilation
Vectors
Embedded Test Bench
Transaction-Based
RTB Generation
Hardware Transactors
C/C
Dynamic Traces
Logic Analyzer
SystemC Channels
Xilinx PR
Xilinx PR
Xilinx PR
SW Debuggers
RTB Config Files
DUT Config Files
In-Circuit Emulation with Target System