High Frequency Model of Sub-100nm High-k RF CMOS - PowerPoint PPT Presentation

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High Frequency Model of Sub-100nm High-k RF CMOS

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Title: 1 Author: masayuki nakagawa Last modified by: nakagawa Created Date: 8/12/2005 10:22:07 AM Document presentation format: – PowerPoint PPT presentation

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Title: High Frequency Model of Sub-100nm High-k RF CMOS


1
High Frequency Model of Sub-100nm High-k RF
CMOS
  • ?M. Nakagawa1, J.Song1, Y. Nara2, M. Yasuhira2,
    F. Ohtsuka2,
  • T. Arikado2, K. Nakamura2, K. Kakushima1, P.
    Ahmet1, K. Tsutsui1 and H. Iwai1
  • 1 Tokyo Institute of Technology,
  • 4259, Nagatsuta-cho,Midoriku,Yokohama,226-8502
    Japan
  • 2 Semiconductor Leading Edge Technologies,
    Inc.(SELETE),Japan
  • Current affiliation Matsushita Electric
    Industrial Co.Ltd., Japan
  • Current affiliation Tokyo Electron LTD., Japan

2
Background RF technology
RF Technology is necessary in future ubiquitous
society and broadband society
RF CMOS can be applied
Fig.1 Application spectrum ITRS2005
  • Miniaturization of MOSFET improves RF
    characteristics
  • CMOS technology apply to RF application
  • Low cost
  • Low power dissipation and high integration

3
High-k and RF CMOS
Limit of miniaturization draws near !!
One is the limit of thin film of gate insulator
Electrical isolation breaks down leading to high
dissipation
High-k insulator resolves this problem High-k is
hot technology in future MOSFET
Leakage current
But..
Concerns about High-k MOSFET in RF region
?Fall of dielectric constant in RF region
by dielectric dispersion ---
High-k is not High-k in RF region? ?Degradation
of RF characteristics
by lower mobility ? High interface
state
Dielectric dispersion
4
Device structure
  • HfSiON (EOT1.5nm)
  • SiON (EOT1.5nm)
  • Gate Length Lg
  • HfSiON(64nm) SiON(51nm)
  • Number of finger 12(W5µm)


Increasing gate width with multi gate finger,
the gate resistance become small
Nf Number of finger
5
DC characteristics and fT, fmax
SiONL/W51nm/60mm HfSiONL/W64nm/60mm
H21dB
UgaindB
  • SiON device has better DC characteristics due to
    electron mobility
  • fT SiON device is higher than HfSiON device
  • fmax There are little difference between two
    devices

Freq
Freq
SiON ft 155GHz HfSiON ft 131GHz
SiON fmax 53GHz HfSiON fmax 58GHz
6
fT,fmax_at_Wf2um
Finger length Wf um
Morifuji, et al., VLSI technology 1999, pp 163-164
  • High fmax is gotten as simulation result
    indicates
  • ft grows with gate length, however fmax falls
    down with gate length

7
How to estimate gate capacitance
Most simple equivalent circuit _at_Vg1.5V, Vd0V
Z11Rg1/(j?Cgategox)Rseries Cgateimag(Z11-Rg-R
series)-1
Gate capacitance is got by deembedding series
resistance from measured Z11
8
High frequency gate capacitance measurement
HfSiON Lg58.6nm
SiON Lg58.6nm
10GHz
10GHz
15GHz
15GHz
20GHz
20GHz
Capacitance fF
Capacitance fF
Including overlap capacitance
VgV
10GHz
20GHz
Capacitance fF
Gate length L nm
Gate length L?L nm
VgV
Intrinsic gate capacitance
  • Gate capacitance is constant at 10GHz20GHz
  • Dielectric dispersion is not seen in this region

9
Conclusion
  • RF characteristics reflect DC characteristics
  • -High electron mobility cause high fT
  • fmax depend on finger length (Wf)
    -High fmax is gotten at Wf
    2um, which checks
    with simulation result
  • Gate capacitance degradation due to dielectric
    dispersion is not seen at 10GHz20GHz
  • High-k MOSFET has potential ability even if at RF
    region
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