WildFire: A Scalable Path for SMPs

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WildFire A Scalable Path for SMPs

• Erick Hagersten and Michael Koster
• Sun Microsystems Inc.
• Presented by Terry Arnold II

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Introduction

• What was the goal?
• How did they achieve it?
• CMR
• HAS
• Competitive Comparisons
• Results
• Questions

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The Goal

• In the past people have been skeptical about the
  ability of SMPs to continue to scale due to their
  bandwidth limitations
• The trend has been to switch to cc-NUMA
• To improve the scalability of SMP technologies

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Cc-NUMA issues

• Great scalability but have less than optimal
  access patterns
• Require high software optimization for capacity
  and conflict misses
• Non trivial scheduling, etc. (resource and memory
  management)

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How?

• The answer is the same as the answer to all
  engineering problems, that is, throwing new
  acronyms at the problem
• Coherent Memory Replication (CMR)
• Hierarchical Affinity Scheduling (HAS)
• Both of these exploit locality as a means of
  increasing performance (that is for OLTP
  workloads)

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The Overview
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The Acronyms CMR

• S-COMA with fixed home locations for each address
• Shadow physical pages
• Coherence at hardware level (64 byte)
• Things start out cc-NUMA and changed into CMR
  based on hardware counters that monitor memory
  access patterns
• Limitations memory-resident pages and large
  physical pages can only be replicated explicitly

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The Acronyms HAS

• Schedules in the following way
• Last processor it ran on
• Same node processor
• Remote node processor (when load balances exceeds
  threshold)

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Implementation

• 2 ASICs NIAC (coherence), NIDC (bit sliced
  interconnect)
• These improve upon latency of a switch
• NIAC Interface and Global-Coherence Layer
• Translators and Counters

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Competition

• The SGI Origin and Sequents NUMA-Q

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Results 1
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Results 2
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Questions?
Is this solution too dependent on the software
(kernel modifications)? How compatible are CMR
and HAS with the other DSM solutions?