EECS%20312%20Discussion%203

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EECS 312 Discussion 3

• 09/20
• Shengshuo Lu
• (luss_at_umich.edu)

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Overview

• Reminder
• HW 1 Due Sep 24
• Diode
• Transistors

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Diode
G
S
D
4
Diode
5
Diode
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Built-in PotentialDepletion Region Width
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Diode Current
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Diffusion capacitance
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NMOS
G
S
D
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Threshold Voltage

• 0 lt VGS lt VT
• Repel mobile holesand accumulation of electron
  beneaththe gate oxide
• VGS gt VT
• Surface is as strongly n-type asthe substrate is
  p-type

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Operation Regions Linear (lab 2)

1. VGS gt VT
2. VGS VT gt VDS
3. Linear contribution of VGT to ID

In case of a P-type MOSFET, the inequalities used
above should be directed opposite
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Operation Regions Saturation (lab 2)

1. VGS gt VT
2. VGS VT VDS
3. Quadratic contribution of VGTto ID
4. channel-length modulation parameter

In case of a P-type MOSFET, the inequalities used
above should be directed opposite
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Operation Regions Velocity Saturated
Short Channel Effects
Strong electric field causes carrier mobility
degradation Compared to feature scaling,
voltage scaling is lagging behind
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A unified model

• If VDS is minimum
• Linear region
• 2. If VGT is minimum
• Saturation Region
• 3. If VDSAT is minimum
• Velocity saturated region