XILINX FPGA

1
XILINX FPGA

• Lecture 26

2
ASIC Design Flow

• Design entry
• Logic synthesis
• Pre-layout simulation
• Floorplanning and placement
• Routing
• Post-layout simulation

3
FPGA v.s. Microprocessors

• XilinX XC2V8000 8M equivalent gates, 420MHz
• Intel Pentium 3 9.5M transistors, 800MHz
• Intel Pentium 4 42M transistors, 1.5GHz

4
XC3000 Family

• Figure 13.9

5
Configurable Logic Block

• Figure 13.10

6
Interconnect

• Direction interconnection
• Long lines
• General purpose interconnection
• Figure 13.11

7
Swithbox

• Figure 13.12

8
Input/Output Block

• Figure 13.14

9
Program FPGA

• Configure modes
• Figure 13.15

10
Virtex Family

• Datasheet from XilinX