Address decoders

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Address decoders
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Decoders

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Decoders buildingDecoders utilization
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Decoders

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• Used to enabling appropriate memory chip or I/O
  port according to
• address word
• control signals
• generated by microprocessor.

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Decoders - building

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• Applications
• as primary decoders, (usually on CPU module),
  dividing address space into equal blocks (address
  windows), in some (small) systems the only
  decoders which serve memory I/O
• as module decoders - can use then output signals
  from primary decoding and less sensing
  address lines.

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Decoders - building

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Example of LS138 application
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Decoders - building

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• 2. Using IC binary comparators
• for example 7485, 74688
• direct comparison given address with the state
  of address bus
• allow precise or approximate decoding
• good decoding technique for module decoders.

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Decoders - building

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Example of 7485 application
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Decoders - building

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• 3. Using PLD
• allow free decoding of different memory chips
  and/or I/O ports
• precise or approximate decoding are possible
• can be used to precise module decoding instead
  binary comparators.

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Decoders - utilization of address space

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• 1. Approximate addressing - for address blocks
  (address windows)
• used for memory chips and complex I/O
  devices
• decoders 1zN are usually used
• memory address space is divided into blocks with
  capacity matched to the size of the biggest
  memory chips in system
• I/O address space is divided into K (K2k) equal
  address blocks.

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Decoders - utilization of address space

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• 2. Precise addressing
• applied to I/O devices
• I/O port is a single byte (word) in address
  space with precisely defined access address
• usually applied direct comparison (binary
  comparators, like 7485, 74688) or PLD.

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Decoders - utilization of address space

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Decoders - utilization of address space

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• 3. Two-stage addressing
• applied to I/O devices
• more sensing address bits, like A4..A7, are used
  to select whole device
• more sensing address bits, like A0, A1 address
  ports inside this device
• met in module systems for I/O module
• met in specialised, programmable I/O chips of
  some manufacturers (like Intel, Zilog, ...).

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Decoders - utilization of address space

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Decoders - utilization of address space

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• 4. Line addressing
• chosen address lines are the base to generation
  of select signals for memory chips and I/O
  ports
• met only in very simple and small systems.
• Features
• possible small number of I/O port
• the risk of overlaying memory and I/O ports in
  address space
• very simple building - only single logic gates
  are needed, and in some case even they arent
  necessary
• chip select signals are generated using the
  pairs of signals like /IORQ i Ai or /MREQ i
  Aj

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Decoders - utilization of address space

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• 5. Bi-directional addressing
• applied to I/O devices
• the same address of I/O address space represents
  two ports one input and one output
• differentiation is achieved by transfer
  direction signals, like /RD i /WR
• I/O address can be decoded approximately or
  precisely
• number of I/O devices can be doubled.

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Decoders - utilization of address space

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