FPGA PLB Evaluation using Quantified Boolean Satisfiability

1
FPGA PLB Evaluation using Quantified Boolean
Satisfiability

• Andrew C. Ling M.A.Sc. Candidate University of
  Toronto
• Deshanand P. Singh Ph.D. Altera Corporation
• Professor Stephen D. Brown Altera Corporation
  Toronto University of Toronto

2
Background FPGA
3
Background K-LUT
4
Background K-Input PLB

• The 3-input PLB below CANNOT implement any
  arbitrary 3-input function

5
Background K-Input PLB
6
Motivation

• The cost of implementing a circuit in an FPGA is
  directly proportional to the number of PLBs
  required to implement the functionality of the
  circuit.
• Decreasing the number of PLBs may allow a circuit
  to be realized in a smaller FPGA.
• The PLB architecture has a significant impact on
  the number of PLBs required to realize a
  particular circuit.

7
PLB Evaluation in terms of Area

• Clever PLB designs are necessary to capture the
  majority of the functions encountered in typical
  circuits.
• Extract set of k-Input functions from a large set
  of circuits.
• Examine the percentage of functions that map into
  the PLB structure.

8
Function Mapping Problem
x1x2x3 f
000 0
001 0
010 1
011 0
100 1
101 1
110 1
111 1
QSAT ?
9
Background The Propositional Satisfiability
(SAT) problem

• Given a formula, f

• Defined over a set of variables, V

(a,b,c)
(C1,C2,C3)

• Comprised of a conjunction of clauses

• Each clause is a disjunction of literals of the
  variables V

SAT Seek an assignment of to the variables, V,
which sets the Boolean formula to 1.
Example
abc1
10
Background The Quantified Satisfiability (QSAT)
problem

• Given a formula, f

• Defined over a set of variables, V

(a,b,c)

• Comprised of a conjunction of clauses

(C1,C2,C3)

• Each clause is a disjunction of literals of the
  variables V

• Quantifiers exist on variables V

QSAT Seek an assignment of to the variables, V,
which sets the quantified Boolean formula (QBF)
to 1.
Example
bc1 a 0,1
11
Function Mapping Problem
x1x2x3 f
000 0
001 0
010 1
011 0
100 1
101 1
110 1
111 1
QSAT ?
12
Construction of CNF

• T. Larrabee, Test pattern generation using
  Boolean satisfiability," TCAD, 1992 (Plaisted's
  and Greenbaum's encoding which is based on
  Tseitin's work)
• Creates a Characteristic Function for circuits

x1x2 g f
00 0 1
01 0 1
10 0 1
11 0 0
00 1 0
01 1 0
10 1 0
11 1 1
f(x2g) (x1g) (x2x1g)
13
Construction of CNF (contd)
f AND (x2z1) (x1z1) (x2x1 z1)
f OR (x3g) (z1g) (x3z1 g)
f total fAND fOR (x2z1) (x1z1) (x2x1
z1) (x3g) (z1g) (x3z1 g)
14
Function Mapping Problem
x1x2x3 f
000 0
001 0
010 1
011 0
100 1
101 1
110 1
111 1
QSAT ?
15
Formulating Function Mapping Problem
x1x2x3 f
000 0
001 0
010 1
011 0
100 1
101 1
110 1
111 1
?

• Can function f be implemented in circuit g ?
• Does there exist a configuration to g such that
  for all inputs to g, f is equivalent to g

16
Formulating Function Mapping Problem
x1x2x3 f
000 0
001 0
010 1
011 0
100 1
101 1
110 1
111 1
?

• Derive characteristic function H for circuit g
• Replace all instances of g in H with f
• Hg/f (g f )
• f is equivalent to g

17
Formulating Function Mapping Problem
x1x2x3 f
000 0
001 0
010 1
011 0
100 1
101 1
110 1
111 1
?

• Does there exist a configuration to g such that
  for all inputs to g, f is equivalent to g ?

(g f )
18
Formulating Function Mapping Problem
x1x2x3 f
000 0
001 0
010 1
011 0
100 1
101 1
110 1
111 1
?

• Does there exist a configuration to g such that
  for all inputs to g, f is equivalent to g ?

A
E
l1lm x1xn(g f )
19
Formulating Function Mapping Problem
x1x2x3 f
000 0
001 0
010 1
011 0
100 1
101 1
110 1
111 1
QSAT

• Express as a QBF with inputs (x1xn) and
  configuration bits (l1lm)
• l1lm x1xn (g f )

A
E
20
Results Evaluation of PLBs

• Given a circuit, extract 1000 k-input functions
• k number of inputs to PLB
• Determine number of functions that map into PLB
  using QSAT
• Find a fit percentage

21
Results Evaluation of PLBs
22
Conclusions

• Novell function mapping technique based on QSAT.
• We can use this technique to evaluate PLB
  architectures based on area.

23
Future Work

• Speed up QSAT, use ALL-solution SAT solvers or
  better QBF solvers
• Cannot evaluate area efficiency without looking
  at routing architecture
• Use Dont Cares when mapping functions
• Use genetic algorithms to create candidate PLBs,
  then pipe architectures to our PLB evaluator tool

24
Questions?