SYNCHRONIZED UJT OSCILLATOR

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SYNCHRONIZED UJT OSCILLATOR
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Digital Firing Circuit
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• Sync signal required to synchronize ZCD with ac
  input.
• ZCD gives a pulse every time the input goes
  through a zero.

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Waveforms of Digital Firing Circuit
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O/P of ZCD, Counter.
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• Resets every time the ac input goes through its
  zeros
• This must produce 2n pulses in a half cycle
  duration if 4-bit counter is used it should
  produce 16 pulses in one half cycle.

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Presettable Counter
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• Counter used in down count mode.
• N is the decimal equivalent binary value of
  control signal.
• Value of firing angle ?

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O/P of ZCD, Counter.
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Modified RS Flip-Flop
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• Flip-flop resets every time ac input goes through
  zero.
• Flip-flop sets whenever ac counter overflow
  signal goes high.

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Truth Table of Modified Flip-flop
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Flip-flop Waveforms
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Logic Circuit
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Waveforms at G1 G2 with y0
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Waveforms at G1 G2 with y1
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dv/dt Protection
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,

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di/dt Protection
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Series and Parallel of operation of Thyristors

• If single SCR cannot meet with voltage or current
  requirement.
• To be ensured that SCR rating is fully utilized.

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String Efficiency

• Derating Factor
• DRF 1 String efficiency

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Series Operation

• Forward leakage currents with equal voltage
  sharing

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• Static Dynamic Equalization

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Design of R
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Reverse Recovery Characteristics
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Design of C
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PARALLEL OPERATION
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Magnetic Coupling
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