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The Tiny Encryption Algorithm (TEA)

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The DeltaSum Circuit controls the adder for looping. ... 8-bit Adder. Shift Register. AND Gates. The Entire Circuit. Total Transistor Count ... – PowerPoint PPT presentation

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Title: The Tiny Encryption Algorithm (TEA)


1
The Tiny Encryption Algorithm (TEA) Chip
Ely V. Soto and Todd T. Wilkins
6 December 2001
2
What The Chip Does
  • This chip is a scalable CMOS implementation of
    the tiny encryption algorithm developed in
    software by David Wheeler and Roger Needham of
    Cambridge University, England.
  • The chip receives a serial input data stream
    from the user, performs the operations of the
    algorithm, and delivers a serial data stream of
    ciphertext to the user.

3
The Algorithm
Below is the Tiny Encryption Algorithm void
code(long v, long k) unsigned long yv0,
zv1, sum0, / set up /
delta0x9e3779b9, n32 /
a key schedule constant / while (n-- gt 0)
/ basic
cycle start / sum delta y
(zltlt4)k0 zsum (zgtgt5)k1 z
(yltlt4)k2 ysum (ygtgt5)k3

/ end cycle / v0y v1z
4
Changes to the Algorithm
  • Due to the complexities inherent in the design,
    some modifications to the algorithm are
    implemented in hardware
  • No looping structure.
  • User can accomplish this manually.
  • Data word size reduced from 32 bits to 8 bits.
  • Algorithm still functions, but strength suffers.

5
The Block Diagram
EXT CLK
CLK
CLK
SERIAL IN
CLK/16
z
y
8
8
k1
k0
00000
0000
3
4
8
8-bit XOR
k3
k2
00000
0000
3
4
8
SR-16/Mux
8-bit XOR
SERIAL OUT
6
Power On Reset Circuit
  • Because some of the circuit components need to be
    started in a known state, a power on reset
    circuit has been developed.
  • RC circuit that starts low and gradually reaches
    VDD.
  • During low period, registers are reset.
  • Once high, circuit is functional.

7
Counter Circuit
  • A difficult part of the design was building the
    counter.
  • Design requires feedback.
  • Master-slave JK flip-flop design with integrated
    multiplexers.

1-bit counter
Multiplexer
8
DeltaSum Circuit
  • The DeltaSum Circuit controls the adder for
    looping.
  • This counter is controlled externally by the user
    for enhanced user control over security.
  • AND gates are used with RESETDELTA input to clear
    the counter.

8-bit Adder
Shift Register
AND Gates
9
The Entire Circuit
Total Transistor Count Without pads 3,342 With
pads 4,906 Critical Delay 21.85 ns Clock
45.76 MHz
10
Pin Outs
CNTOVRD
SERIALIN
CLKSERIN
RESETSERCNT
OVERFLOW
RESETDELTA
CLKDELTA
DELTALSB
DELTAMSB
SERIALOUT
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