BDD Representation for Incompletely Specified MultipleOutput Logic Functions and Its Applications to

1
BDD Representation for Incompletely Specified
Multiple-Output Logic Functionsand Its
Applications toFunctional Decomposition

• T. Sasao and M. Matsuura
• Kyushu Institute of Technology
• Iizuka, Japan

2
Outline of the Talk

• LUT Cascade
• Representation of Incompletely Specified
  Functions
• Functional Decomposition
• Example
• Experimental Results
• Arithmetic Functions
• Conclusions

3
LUT Cascade

• New type of ProgrammableLogic Devices.
• Regular Structure.
• Easy to Design and Modify.
• Design directly from BDDs.

4
LUT Cascade Chip

0.35 micron 3MetalCMOS 8-LUT64K (13-input
8-output)6-Tr SRAM 200MHz (Pipeline mode) 1.38W
9.8mm x 9.8mmMore than 99 of chip area is
memory.
5
Applications of LUT Cascade

• Radix converters
• Digital filters
• Routing tables in the internet
• Generation of elementary functions
• Programmable logic controllers
• Replacement of contentaddressable memory

6
Existing Methods to Represent Incompletely
Specified Functions

• Ternary function that takes 3 values.
• A pair of BDDs to represent 3 values.
• Auxiliary variable that representsdont cares.
• Unsuitable for decompositions of multiple-output
  functions.

7
Existing Methods to Represent Multiple-Output
Functions

• SBDD (Shared BDD)
• MTBDD (Multi-terminal BDD)
• BDD_for_CF(BDD for Characteristic Function)
• Suitable for cascade synthesis.
• Presented at DAC2004

8
Characteristic Function of Completely Specified
Multiple-Output Function
Multiple-output function F(f1(X), f2(X),,
fm(X))
Characteristic function
9
Example of Characteristic Function
x2
y1
x1
y2
c
x1
x2
f1
f2
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
1
0
0
1
0
1
1
1
0
1
1
0
0
1
1
1
0
1
0
0
0
1
0
1
0
0
1
1
0
0
1
1
0
0
0
1
1
1
0
1
0
1
0
0
1
0
1
1
1
1
1
1
0
0
1
1
1
1
0
10
Incompletely Specified Function
d Don't care.
11
Characteristic Function of Multiple-output
Function
Completely specified function
Incompletely specified function
12
Node in the BDD_for_CF
yi
yi
yi
0
0
13
Example of BDD_for_CF
x1
x2
x3
y1
x4
y2
1
14
Functional Decomposition
Decomposition chart
Bound set
X1(x1,x2)
00
01
10
11
x1
H
X1
G
x2
Free set
00
0
1
0
1
f
x3
01
1
1
1
1
X2(x3,x4)
X2
x4
10
1
0
1
0
11
1
0
1
0
f g(h(X1),X2)
15
Functional Decomposition Using BDDs
X1
Column Multiplicity Width of BDD in X1 The
number of nodes in the lower part that are
directly connected to the nodes in the upper part.
X2
0
1
16
Functional Decomposition Using BDDs
x1
x1
x2
x2
x2
x2
x3,x4
x3
x3
0
1
00
1
1
01
x4
1
0
10
1
0
11
0
1
17
Theorem

• Let the variable ordering of BDD for CF be(X1,
  Y1, X2, Y2), and let W be the width of the BDD,
  where (X1, Y1) is bound set and edges to constant
  0 from the output variables are ignored. Then,

18
Merging Compatible Functions
X1(x1, x2)
00
01
10
11
00
01
10
11
00
0
0
d
1
00
0
0
1
1
01
1
1
d
d
01
1
1
d
d
X2(x3, x4)
10
d
1
0
d
10
1
1
0
0
11
0
d
0
0
11
0
0
0
0
F1
F2
F3
F4
F5
F6
F1
F2
Compatible Graph
F3
F4
19
Example Reduction of Width (1)
Width
Width
x1
1
1
x2
2
2
x3
4
3
1
11
3
1
2
3
4
y1
8
6
5
7
8
9
10
x4
4
4
y2
3
3
1
1
1
1
20
Compatible Graph
x1
x2
10
7
8
x3
y1
5
7
8
9
6
10
6
9
5
x4
y2
1
21
Example Reduction of Width (2)
Width
Width
x1
1
x2
2
x3
3
y1
12
5
7
8
9
10
5
13
9
6
6
x4
4
y2
6
3
1
1
1
22
Before vs. After Reduction
Width
Width
x1
1
x2
2
x3
4
y1
8
x4
4
y2
3
1
1
1
23
Existing Method of BDD for Incompletely Specified
Function Shiple, et al, DAC94.
When two sub-functions are compatible, they are
merge into one.
h
f
g
24
Our Method vs. Existing Method
Width
Width
x1
1
1
x2
2
2
x3
3
3
y1
4
5
x4
3
3
y2
2
2
1
1
1
1
25
LUT Cascade with Intermediate Outputs
Cell
Cell
Cell
Cell
rails
26
Incompletely Specified Arithmetic Functions

• Residue number system (RNS)to binary converter
• k-nary to binary converter
• k-nary adder and multiplier
• Binary coded k-nary inputs produce don't cares.

27
Comparison of Maximum Widths
28
Reduction of LUT Cascadeby Dont Cares
29
5-7-11-13 RNS to Binary Converter
Our method
DC0
12
2
12
2
8
6
8
7
(LSB)
2
12
2
12
4
8
8
6
(MSB)
2
12
Number of LUT inputs 12 Number of rails 8
3
6
30
Summary

• Method to represent incompletely specified
  multiple-output logic functions.
• Method to reduce widths of BDDs.
• Designed LUT cascades for k-nary arithmetic
  circuits.
• The method is useful for the design of LUT
  cascade.