LEON SPARC V8 Processor

1
LEON SPARC V8 Processor

• Amitoj Cheema
• Ajay Bhutani

2
OUTLINE

• Features
• Configuration
• Synthesis
• Customization
• Interfacing with ZBT RAM
• Software Issues
• Leon MP

3
Features

• Implements a 32-bit SPARC V8 processor.
• Separate instruction and data caches, hardware
  multiplier and divider, interrupt controller
• Debug Support Unit (DSU) with trace buffer, two
  24-bit timers, two UARTs
• 16-bit I/O port, flexible memory controller,
  Ethernet MAC ,PCI interface.
• New modules can easily be added using the on-chip
  AMBA AHB/APB buses.

4
Integer Unit

• 5 stage pipelined
• configurable number of Register Windows (2 - 32).
  Default setting of 8.
• Up to four watchpoint registers configured.
• Aids Software Debugging
• Can cause a trap on an arbitrary instruction or
  data address range.
• If DSU is enabled, the watchpoints can be used to
  enter debug mode.

5
Debug Support Unit(DSU)

• Allows non-intrusive debugging on target
  hardware.
• insert breakpoints and watchpoints
• access to all on-chip registers from a remote
  debugger( GDB etc)
• Trace buffer to trace the executed instruction
  flow
• Can monitor AHB bus traffic.
• Communicates to an outside debugger using a
  dedicated UART or through a AHB master (PCI)
• Can load software into processor

6
Others

• Memory interface
• Very flexible memory interface to PROM, memory
  mapped I/O, SRAM,SDRAM).
• Introduce wait states
• Flexible data width (8,16 or 32 bit)
• Through MCFG1 and MCFG2 Registers
• AMBA AHB APB Buses
• PCI Interface
• Ethernet MAC

7
OUTLINE

• Features
• Configuration
• Synthesis
• Customization
• Interfacing with ZBT RAM
• Software Issues
• Leon MP

8
Configuration Methods

• Graphical (Easy)
• Manual (more powerful)
• Leon/device.vhd

9
Important Choices (Graphical)

• Synthesis -gt Infer ROM
• For ADM-XRC board ( Virtex 2)
• Process -gt DSU
• Boot Options
• Internal Prom
• Read / Write wait states -gt 1
• System Frequency -gt 33000000
• Baud Rate
• Pabits -gt 8

10
Configuration using Device.vhd

• Provides more configuration options than
  graphical
• Configure AHB Master/Slave address space
• PCI bus address space options
• Memory Controller additional Configurations
• Presently Graphical Configuration for LEON-MP not
  available.

11
OUTLINE

• Features
• Configuration
• Synthesis
• Customization
• Interfacing with ZBT RAM
• Software Issues
• Leon MP

12
Synthesis

• Whole synthesis using Xilinx ISE tools
• EDIF2NGD tool doesnt work properly
• Synplify Synthesis doesnt work
• Many template boards configurations available in
  Leon distribution for common boards.
• Hecht-xcv800 for Xess board

13
Synthesis Flow
RTL files of Leon
Leon.xst
XST
Top_leon.ngc
Ngdbuild
Top_leon.ngd
Top_leon_xst.bit
Map
Bitgen.ut
Top_leon.ncd
Top_leon_xst.ncd
Par
14
Synthesis for ADM-XRC-II

• Requires Delay Interface and a wrapper,
  top_leon
• Required vhdl files, scripts and Makefiles
  available in cheema-xc2v folder on project
  webpage.
• Prepared along the lines of other templates
• Sample bit files included.

15
OUTLINE

• Features
• Configuration
• Synthesis
• Customization
• Interfacing with ZBT RAM
• Software Issues
• Leon MP

16
Adding Module to AMBA.

• Standard records to be used

17
Adding a Slave to AHB

• mcore.vhd
• (SLAVE_MAX) Look for an unused slot in ahbsi
  ahbso arrays. Max 7 slaves can be placed in
  default configuration. Adding more needs
  extensive changes in the AHB Controller.
• Use the corresponding ahbsi ahbso signals for
  the slave.Add the slave as a component to the
  mcore module.
• device.vhd
• Use the address map array to determine the
  address for the new slave.
• (0,0,0,0,0,0,0,0,1,2,7,7,7,7,7,4).

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Adding a Master to AHB

• Each master (except the processors) is
  accompanied by a slave interface for configuring
  the module registers.
• The extra available slots in ahbmi and ahbmo
  signals can be used to add the new master
  interface. The number of masters is given by
  MASTERS variable. The slave part can be added as
  previously given.
• Interrupts can be added to the corresponding
  processor interrupt table in the file mcore.vhd.
  Interrupts number 12-14 are free and can be used.

19
Adding Slaves to APB

• The input output signals are available as
• apb_slv_in_type
• apb_slv_out_type.
• mcore.vhd
• The number of apb slaves can be changed by
  changing the array size of apbsi apbso arrays.
• apbmst.vhd
• Address mapping as well as the maximum allowed
  apb modules are hard coded in this file. Changes
  can be made accordingly.

20
OUTLINE

• Features
• Configuration
• Synthesis
• Customization
• Interfacing with ZBT RAM
• Software Issues
• Leon MP

21
Timing Diagram for Read Cycles
Clock
Leon_add
address0
Leon_oen
Lead_out State
Rd_state
r2
r0
r1
r2
Rd_internal
Mem_oen
data0
data
Wait state
22
Timing Diagram for Write Cycles
Clock
Leon_data
data0
Leon_rwen/ Mem_rwen
wr_state
w2
w0
w1
w2
wr_internal
data0
L_data_int
data0
Mem_data
Wait state
23
Delay Interface

• Handles Consecutive reads by Leon processor
• Introduces delay of 1 clock cycle for both read
  and write
• SRAM controller needs to be tweaked to accept 1
  wait state

24
OUTLINE

• Features
• Configuration
• Synthesis
• Customization
• Interfacing with ZBT RAM
• Software Issues
• Leon MP

25
Software Issues

• AHB/ APB Address mappings need to be correct in
  drivers
• Wait States
• Correct information needed in BOOT PROM.
• Linux Boot initialization code.
• Debug support Unit Monitor (dsumon).
• Correct Baud rate and Processor Frequency
  Settings in the UART initialization code.

26
Software Issues

• Correct RAM configuration in initialization code
  like
• SRAM /SDRAM present/absent.
• RAM Bank Size.
• Number of RAM banks.(1-4)
• RAM Width.(8-bit,16-bit 32-bit).
• These values are set in MEMCFG2
  register(0x80000004).

27
Minicom Settings

• When using DSU.
• Baud Rate depends on the baud rate specified in
  the program in use. (default 38400)
• Hardware Flow Control No
• Software Flow Control Yes.
• When using Boot ROM
• Hardware Flow Control Yes
• Software Flow Control No
• Download mode ascii
• Program format Motorola Srec.

28
OUTLINE

• Features
• Configuration
• Synthesis
• Customization
• Interfacing with ZBT RAM
• Software Issues
• Leon MP

29
Leon-MP

• Can be configured to have up to 8 Leon procs.
• In house Real Time Operating system RTKER ported
  on the platform.
• Auto-boot on start. Waits for Program on UART 1.
• DSU available for debugging.

30
A 2 Processor Core implementation
PCI
DSU
AHB Controller
User I/O
AMBA AHB
AHB BOOT REG
AHB/APB Bridge
DSL
UART/Timers/IO Ctrl
Memory Controller
AMBA APB
IRQ CTRl1
IRQ CTRl2
31

• Add proc id to PSR to uniquely distinguish a
  processor

PSR
0000
31 17
14 0

Boot Processor with proc id 0
32
Interrupt Controllers

• Each processor contains its own interrupt
  controller.
• Each processor has two timers each assigned to
  it. The interrupts from these timers are handled
  by the respective interrupt controllers.
• The Boot Processor handles the interrupts from
  UART, network, PCI etc.

33
AHB Boot Slave

• A special slave is provided on the AHB bus with
  the following
• BOOT registers The Boot processor uses these
  registers to provide program start address to the
  application processors.
• Locks Used for Operating System Semaphores.
  Important for data consistency on a multi
  processor platform.

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BOOT FLOW

• Global start
• Read processor ID value.
• If boot register then goto 3 else goto 9.
• BOOT PROCESSOR
• Perform standard Peripheral initialization.
• Detecting Ram bank size width number etc.
• Initializing timers, uarts etc.
• Send boot signal on the UART 1.
• Wait for program on UART 1.

35
BOOT FLOW

• BOOT PROCESSOR
• Download the program.
• Write the corresponding start address for each of
  the processors at the corresponding boot
  registers.
• Start execution.

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BOOT FLOW

• APPLICATION PROCESSOR
• Perform Processor specific initializations like
  Setting Timers and Interrupt tables.
• Read the corresponding boot register value to
  load the address for program execution.
• Jump to the given value.

37
References

• Mailing list (leon_sparc_at_yahoogroups.com)To
  subscribe to the mailing list send mail to
  leon_sparc-subscribe_at_yahoogroups.com. The subject
  should be 'subscribe' (without the quotation
  marks).
• LEON Toolbox (http//www.leox.org/)Seems to have
  come to a stand-still for quite some time. I have
  seen them participate in the uclinux mailing list
  though.
• Linux SPARC (http//www.ultralinux.org/)Homepage
  of the Linux port to the SPARC architecture.
  Various mailing lists can be found in the 'Lists'
  section.To subscribe mail Majordomo_at_vger.kernel.o
  rg. Subject is 'subscribe sparclinux
  your_email_at_your.domain'.
• Gaisler Linux for LEON (http//www.gaisler.com/pro
  ducts/linux.html)Toolchain, Patches, Simulator,
  Links, etc.

38
References

• LEON MMU (http//www.ra.informatik.uni-stuttgart.d
  e/LeonMMU/)MMU development for LEON and some
  information on Linux for LEON by Konrad Eisele.
• LEON2 Support for Linux 2.6.x (http//www.ra.infor
  matik.uni-stuttgart.de/holstsn/)Linux 2.6.x
  kernel patches for LEON2 with MMU support.
• The Lion project - Linux for the LEON SPARC
  Processor
• http//wwwhsse.fh-hagenberg.at/Studierende/hse0
  2006/lion/