An Approach to Test Programs Generation for Microprocessors Based on Pipeline Hazards Templates - PowerPoint PPT Presentation

About This Presentation
Title:

An Approach to Test Programs Generation for Microprocessors Based on Pipeline Hazards Templates

Description:

Title: Methodology and Experience of Simulation-Based Verification of Microprocessor Units Based on Cycle-Accurate Contract Specifications Last modified by – PowerPoint PPT presentation

Number of Views:246
Avg rating:3.0/5.0
Slides: 25
Provided by: syrcoseIs
Category:

less

Transcript and Presenter's Notes

Title: An Approach to Test Programs Generation for Microprocessors Based on Pipeline Hazards Templates


1
An Approach to Test Programs Generation for
Microprocessors Based onPipeline Hazards
Templates
  • Alexander Kamkin and Dmitry Vorobyev
  • Institute for System Programming of RAS

2
Designing and Testing of microprocessors
  • Cost of missed in the chip errors may be very
    high
  • The most of errors occur in the functionality
  • Verification efforts may reach to 80 of all
    designing efforts
  • Testing is carried out at all design stages

3
Control logic and pipeline
  • Control logic is internal functionality
    responsible for controlling instructions
    executions
  • Classic pipeline
  • Instruction Fetch
  • Instruction Decode
  • Execute
  • Memory Access
  • WriteBack

4
Complex pipeline situations
Ideal Processing
I1
IF
ID
EX
MA
WB
I2
IF
ID
EX
MA
WB
I3
IF
ID
EX
MA
WB
I4
IF
ID
EX
MA
WB
I5
IF
ID
EX
MA
WB
Clock cycle
Instruction
Pipeline processes without any idle
5
Complex pipeline situations
Structural Hazard
I1
IF
ID
EX
MA
WB
I2ADD
IF
ID
EX
MA
WB
I3
IF
ID
EX
MA
WB
I4ADD
IF
ID
EX
MA
WB
I5
IF
ID
EX
MA
WB
Clock cycle
Instruction
The same unit is used in instructions
6
Complex pipeline situations
Data Hazard
I1
IF
ID
EX
MA
WB
I2ADD
IF
ID
EX
MA
WB
I3SUB(Dep.)
IF
ID
EX
MA
WB
I4
IF
ID
EX
MA
WB
I5
IF
ID
EX
MA
WB
Clock cycle
Instruction
Data is used before it is available
7
Complex pipeline situations
Control hazard
I1
IF
ID
EX
MA
WB
I2
IF
ID
EX
MA
WB
I3J
IF
ID
EX
MA
WB
I4
xIF
xID
xEX
xMA
xWB
I5
xIF
xID
xEX
xMA
xWB
Clock cycle
Instruction
Branch instruction leads to jump
8
Complex pipeline situations
Exception raises
I1
IF
ID
EX
MA
WB
I2
IF
ID
EX
MA
WB
I3
IF
ID
EX
MA
WB
I4SB
IF
ID
EX
MA
WB
I5
xIF
xID
xEX
xMA
xWB
Clock cycle
Instruction
Exception raises when accessing to memory
9
Techniques of the control logic testing
  • Cycle-accurate techniques
  • High testing coverage
  • Inexpediency/impossibility of use at early
    designing stages
  • Template-based techniques
  • Coverage is unsystematic and difficult for
    evaluation
  • Can be used at the different stages

10
Techniques of the control logic testing
  • Cycle-accurate techniques
  • High testing coverage
  • Inexpediency/impossibility of use at early
    designing stages
  • Template-based techniques
  • Coverage is unsystematic and difficult for
    evaluation
  • Can be used at the different stages
  • Our approach
  • Using of models gives systematic for coverage
  • Using of the generalized pipeline hazards
    templates that allows using at different stages

Gap in designing process
11
Foundations of the approach (1)
  • Approach uses formal specifications of
    microprocessor ISA
  • Structure of the test program
  • Test ltPrei, Actioni, Postigti0,n-1,
  • Using test templates to represent test action
    instead of concrete test actions
  • Specifying formally test situations
  • Specifying formally dependencies

12
Foundations of the approach (2)
  • Test situations describe necessary parameters of
    testing component
  • Dependencies between instructions
  • Register dependencies
  • Address dependencies
  • Test program are generated automatically by
    combining test situations and test dependencies

13
The suggested approach
  • Highlight interesting situations in pipeline
    functioning
  • Produce generalized specifications (basic
    templates) for each type of hazard
  • Define parameters for simple test actions
  • Define parameters for composite test actions
    using operations over basic templates
  • Generate tests using templates

14
Generalized Specifications of Hazards
Generalized Templates
Parametrized Generalized Templates
15
Generalized Specification of Exceptions
  • PreInstructions
  • ExceptionInstruction _at_ExceptionType
  • PostInstructions

16
Generalized Specification of Exceptions
  • PreInstructions dadd
  • ExceptionInstruction _at_ExceptionType
    TLBInvalid
  • PostInstructions daddiu
  • dadd r25, r30, r7
  • lb r22, 0(r4) // TLBInvalidtrue
  • daddiu r5, r18, 13457

How may Basic Template be translated to the test
action?
17
Generalized Specification of Data Hazards
  • PreInstructions
  • FirstInstruction
  • InnerInstructions
  • SecondInstruction _at_Dependency
  • PostInstructions

18
Generalized Specification of Data Hazards
  • PreInstructions
  • FirstInstruction madd.s
  • InnerInstructions add.s
  • SecondInstruction _at_Dependency
  • register write-write
  • PostInstructions div.s
  • madd.s f18, f6, f28, f10
  • add.s f8, f17, f3
  • ceil.l.s f2, f18 // Data hazard
  • div.s f23, f13, f24

How may Basic Template be translated to the test
action?
19
Test Program Generation
  • Simple test actions
  • Basic templates of a single situation with
    parameters describes situation
  • Composite test actions
  • Operations over Basic Templates define parameters
    for composite situations

20
Operations for Composite Test Actions
  • Overlapping TTH1TH2
  • Shift THTH1?TH2
  • Concatenation TT1?T2
  • Nesting THTH1T

21
Example of the Operation
  • Using overlapping operation for data hazard and
    structural hazard
  • FirstInstruction1add.s, div.s
  • FirstInstruction2mul.s, div.s
  • FirstInstruction FirstInstruction1 n
    FirstInstruction2
  • SecondInstruction SecondInstruction1 n
    SecondInstruction2
  • div.s f18, f6, f28, f10
  • add.s f8, f17, f3
  • div.d f2, f18 // Data hazard and
    Structural hazard
  • div.s f23, f13, f24

22
Case study
  • The approach was applied to verification of two
    arithmetical coprocessors
  • Floating point coprocessor
  • Complex arithmetic coprocessor

23
Future work
  • Extend approach using accurate-cycled models

24
Thank You!Questions?
Write a Comment
User Comments (0)
About PowerShow.com