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Digital Logic

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Chapter 10_1 Digital Logic Use of decoders To address 1K byte memory using four 256 x 8 bit RAM chips Small-scale integration Early integrated circuit provided from ... – PowerPoint PPT presentation

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Title: Digital Logic


1
Chapter 10_1
  • Digital Logic

2
Boolean Operators
  • NOT
  • AND
  • OR
  • XOR
  • NAND
  • NOR
  • Truth Tables

3
Boolean Operators
  • NOT A A
  • A AND B A?B
  • A OR B A B
  • A XOR B 1 if and only if one of
    A or B is 1
  • A NAND B NOT ( A AND B)
  • NOR NOT (A OR B)
  • Truth Tables

4
Boolean Algebra
  • Based on symbolic logic, designed by George Boole
  • Boolean expressions created from
  • NOT, AND, OR

5
NOT
  • Inverts (reverses) a boolean value
  • Truth table for Boolean NOT operator

6
AND
  • Truth table for Boolean AND operator

7
OR
  • Truth table for Boolean OR operator

8
Operator Precedence
  • Examples showing the order of operations

9
Truth Tables (1 of 3)
  • A Boolean function has one or more Boolean
    inputs, and returns a single Boolean output.
  • A truth table shows all the inputs and outputs of
    a Boolean function

Example ?X ? Y
10
Truth Tables (2 of 3)
  • Example X ? ?Y

11
Truth Tables (3 of 3)
  • Example (Y ? S) ? (X ? ?S)

12
Basic Identities of Boolean Algebra
Basic Postulates Basic Postulates Basic Postulates
A B B A A B B A Commutative Laws
A (B C) (A B) (A C) A (B C) (A B) (A C) Distributive Laws
1 A A 0 A A Identity Elements
A 0 A 1 Inverse Elements
Other Identities Other Identities Other Identities
0 A 0 1 A 1  
A A A A A A  
A (B C) (A B) C A (B C) (A B) C Associative Laws
DeMorgan's Theorem
13
De Morgans Theorem
  • A NOR B (NOT A) AND (NOT B)
  • A NAND B (NOT A) OR (NOT B)

14
Basic Logic Gates

15
NAND Gates
16
NOR Gates

17
Sum of products
  • F ABC ABC ABC

18
Product of sums
  • (X?Y?Z) X Y Z (De Morgan)

19
Product of sums

20
Simplification of Boolean expression
  • Algebraic simplification
  • Karnaugh maps
  • Quine McKluskey Tables

21
Algebraic simplification
  • Show how to simplify
  • F ABC ABC ABC
  • To become
  • F AB BC
  • B(A C)

22
Simplified implementation of F ABC ABC
ABC B(A C)
23
Karnaugh Maps
24
The use of Karnaugh maps
25
Overlapping groups F ABC ABC ABC
B(A C)
26
The Quine-McKluskey Method
27
2nd stageAll pairs that differ in one variable
28
Last stage
29
Final stage
  • Circle each x that is alone in a column.
  • Then place a square around each X in any row in
    which there is a circled X.
  • If every column now has either a squared or a
    circled X, then we are done, and those row
    elements whose Xs have been marked constitute the
    minimal expression.
  • ABC ACD ABC ACD

30
NAND

31
Multiplexor
S2 S1 F
0 0 D0
0 1 D1
1 0 D2
1 1 D3
32
Multiplexor implementation

33
Decoder

34
Use of decoders
  • To address 1K byte memory using four
  • 256 x 8 bit RAM chips

35
Small-scale integration
  • Early integrated circuit provided from one to ten
    gates on a chip.
  • The next slide shows a few examples of these SSI
    chips.

36
(No Transcript)
37
Programmable Logic Array (PLA)

38
Programmed PLA

39
Read-only memory

40
A 64 bit ROM

41
Adders

42
4-Bit Adder

43
Implementation of an Adder

44
Multi-output adder
  • The output from each adder depends on the output
    from the previous adder.
  • Thus there is an increasing delay from the least
    significant to the most significant bit.
  • For larger adders the accumulated delay can
    become unacceptably high.

45
32-Bit Adder using 8-Bit Adders

46
Carry look ahead
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