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COMP290052 Graphics Hardware
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Strap on bd. 30. The UNIVERSITY of NORTH CAROLINA at CHAPEL HILL. Xess XSTOOLs ... CCLK on the Programming File properties. Move strap. Download appropriate ... – PowerPoint PPT presentation
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Title: COMP290052 Graphics Hardware
1
COMP290-052Graphics Hardware
- Anselmo Lastra
2
What Course About
- Design of graphics hardware (or hdw for similar
purposes) - NOT about use of commodity GPUs
3
My Intent
- Investigate use of FPGAs for prototyping research
- Very good results in ugrad class
- Seminar on architectural ideas
- Read and discuss papers for research ideas
- Papers from general CPU architecture, etc.
- I see this as advanced seminar
- Driven by your research interests
4
Requirements
- Experience with digital hardware
- Undergrad class
- Hopefully at least a bit hands-on
5
Format (subject to change)
- Ill get you started on FPGA and DRAM
- Well take turns leading paper discussion
- Everyone reads!
- Projects
- Ramp up with simple designs
- Individual or group projects
6
FPGA/Design Subtopics
- This week Verilog, tools, etc.
- Assignment VGA scanout
- Next week Ill be gone
- Third week DRAM
- Assignment build frame buffer
- Later
- rasterizer design, arithmetic units, control
strategies, etc.
7
Paper Topics
- Implications of billion-transistor chips
- Architectural styles
- Streaming, SIMD, dataflow, network processors
etc. - Processor-enhanced memories
- Caches, memory latency
- Reconfigurable logic
- Power (for handhelds or just efficiency)
- Hardware/software design high-level synthesis
and languages such as Handel-C - Your topic here
- Please contribute topics and paper suggestions
8
Projects
- Id like to talk to each of you
- Critical to identify projects because well start
building infrastructure within 3-4 weeks - Teams OK
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Book
- Asked bookstore to order a Verilog reference
- Optional
- Lots of docs on web also
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Time Change?
- Leonard (and others) would like to attend
- Maybe try to shift time to accommodate
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Topics for Next Few Classes
- The hardware
- Design tools overview
- Whats in FPGAs
- Verilog basics
- Simulation
- Ill be gone (Eurographics) next week
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The Hardware
- Several types of boards
- Xess XSA-100 used for undergrad class
- Digilent Digilab IIE
- Xess XSB-300E (coming soon)
- Digilent D2-FT (coming soon)
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XSA-100
- Spartan IIE
- VGA is 2 bits per component
- Resistor ladder
- 8Mx16 SDRAM
- Have couple of peripheral bds
- USB, RS232
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Digilab IIE
- Larger IIE
- My DVI board
- Building SDRAM board
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XSB-300E
- 30-bit DAC
- SDRAM
- USB or Ethernet for interface?
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D2-FT
- More device pins
- We can use multiple (4-5) SDRAM boards
- Have ordered SRAM, USB, and Ethernet peripheral
boards
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Other possibilities
- Can get Spartan 3 or Virtex chips
- Larger
- More features, more embedded RAM
- Build your own
- Little peripherals like the DVI out
- Firewire?
- DVI in?
- 3-day turn on PCBs and cheap
- Have some video DACs
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Logic Analyzer
- PKLA-1116
- USB
- 16 channels
- 200MHz
- Software at
- http//www.acute.com.tw/indexeng.htm
- Please dont lose probes
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Other Equipment
- Older scopes in SN027
- Fancier gear in GLAB
- Faster logic analyzers
- Faster scopes
- Digital scopes (dont like)
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Lets Figure Use of Hdw
- How we do this depends on class size
- All in lab
- Checkout from Missy. How long?
- Well try SN027
- LEGO class in there also
21
Design Tools
- Xilinx ise suite
- Webpack similar and doesnt need license
- Download from xilinx.com, use at home
- Full version allows
- Embedded processors
- Other cores, like logic analyzer
- Larger devices
- Simulator is Modelsim (Mentor)
- Limited version, full one coming
22
Installing ISE on your PC
- Check out disks from Missy Wood
- Please bring them back soon
- Register
- May also need to register for videos, etc
- Or use ID and code that I give you
23
Demo of design tools
- Brief
- You can figure out most of this easily
24
New Project
- Make sure family (Spartan2 or 2E), device, pins
OK - Spaces in path can be problem
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Add New
- Verilog module
- Verilog test fixture
- Test Bench Waveform
- Implementation Constraints File
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Verilog Module
- Just a simple one to illustrate
- You can Synthesize and look at the report
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Implementation Constraints
- Need to specify pins
- There are also clock constraints we wont worry
about - Look for pinouts on documentation for particular
board - See links page on class web pages
- Implement and Generate Programming File
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Downloading to card
- Xilinx iMPACT
- Part of ISE
- Uses JTAG
- Xess only
- Xess tools, open source
- Must change jumper on card
- Later may want to use parallel port for
communication w/ PC
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To use iMPACT
- Right click Generate Programming File
- StartUp tab, set clock to JTAG
- Generate
- Strap on bd.
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Xess XSTOOLs
- Select the CCLK on the Programming File
properties - Move strap
- Download appropriate code to CPLD
- Use XSLOAD to load .bit file
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Next Time
- Whats in FPGA
- Verilog
- ModelSim
- Testbenches
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