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The Simplified Instructional Computer SICSICXE

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Title: The Simplified Instructional Computer SICSICXE


1
The Simplified Instructional Computer (SIC/SICXE)
2
Chapter Overview
  • SIC Machine Architecture
  • SIC Programming Examples
  • SIC/XE Machine Architecture
  • SIC/XE Programming Examples

3
SIC SIC/XE
  • Like many other products, SIC comes in two
    versions
  • The standard model
  • An XE version
  • extra equipments, extra expensive
  • The two versions has been designed to be upward
    compatible

4
SIC Machine Architecture (1/7)
  • Memory
  • Memory consists of 8-bit bytes
  • Any 3 consecutive bytes form a word (24 bits)
  • Total of 32768 (215) bytes in the computer memory

5
SIC Machine Architecture (2/7)
  • Registers
  • Five registers
  • Each register is 24 bits in length

6
SIC Machine Architecture (3/7)
  • Data Formats
  • Integers are stored as 24-bit binary number
  • 2s complement representation for negative values
  • Characters are stored using 8-bit ASCII codes
  • No floating-point hardware on the standard
    version of SIC

7
SIC Machine Architecture (4/7)
  • Instruction Formats
  • Standard version of SIC

The flag bit x is used to indicate
indexed-addressing mode
8
SIC Machine Architecture (5/7)
  • Addressing Modes
  • There are two addressing modes available
  • Indicated by x bit in the instruction

(X) the contents of register X
9
SIC Machine Architecture (6/7)
  • Instruction Set
  • Load and store registers
  • LDA, LDX, STA, STX, etc.
  • Integer arithmetic operations
  • ADD, SUB, MUL, DIV
  • All arithmetic operations involve register A and
    a word in memory, with the result being left in A
  • COMP
  • Conditional jump instructions
  • JLT, JEQ, JGT
  • Subroutine linkage
  • JSUB, RSUB
  • See appendix A, Page 495

10
SIC Machine Architecture (7/7)
  • Input and Output
  • Input and output are performed by transferring 1
    byte at a time to or from the rightmost 8 bits of
    register A
  • Test Device TD instruction
  • Read Data (RD)
  • Write Data (WD)

11
SIC Programming Examples (Fig 1.2a)
12
SIC Programming Example (Fig 1.3a)
13
SIC Programming Example (Fig 1.4a)
14
SIC Programming Example (Fig 1.5a)
15
SIC Programming Example (Fig 1.6)
16
SIC Programming Example (Fig 1.7a)
17
SIC/XE Machine Architecture (1/13)
  • Memory
  • Maximum memory available on a SIC/XE system is 1
    megabyte (220 bytes)

18
SIC/XE Machine Architecture (2/13)
  • Registers
  • Additional registers are provided by SIC/XE

19
SIC/XE Machine Architecture (3/13)
  • There is a 48-bit floating-point data type

F2(e-1024)
20
SIC/XE Machine Architecture (4/13)
  • Instruction Formats

Format 1 (1 byte)
Format 2 (2 bytes)
Format 3 (3 bytes)
Format 4 (4 bytes)
Formats 1 and 2 are instructions that do not
reference memory at all
21
SIC/XE Machine Architecture (5/13)
  • Addressing modes
  • Base relative (n1, i1, b1, p0)
  • Program-counter relative (n1, i1, b0, p1)
  • Direct (n1, i1, b0, p0)
  • Immediate (n0, i1, x0)
  • Indirect (n1, i0, x0)
  • Indexing (both n i 0 or 1, x1)
  • Extended (e1)

22
SIC/XE Machine Architecture (6/13)
  • Base Relative Addressing Mode

n1, i1, b1, p0, TA(B)disp (0?disp
?4095)
  • Program-Counter Relative Addressing Mode

n1, i1, b0, p1, TA(PC)disp (-2048?disp
?2047)
23
SIC/XE Machine Architecture (7/13)
  • Direct Addressing Mode

n1, i1, b0, p0, TAdisp (0?disp ?4095)
n1, i1, b0, p0, TA(X)disp (with index
addressing mode)
24
SIC/XE Machine Architecture (8/13)
  • Immediate Addressing Mode

n0, i1, x0, operanddisp
  • Indirect Addressing Mode

n1, i0, x0, TA(disp)
25
SIC/XE Machine Architecture (9/13)
  • Simple Addressing Mode

i0, n0, TAbpedisp (SIC standard)
i1, n1, TAdisp (SIC/XE standard)
26
SIC/XE Machine Architecture (10/13)
  • Addressing Modes Summary (p.499)

27
SIC/XE Machine Architecture (11/13)
28
SIC/XE Machine Architecture (12/13)
  • Instruction Set
  • Instructions to load and store the new registers
  • LDB, STB, etc.
  • Floating-point arithmetic operations
  • ADDF, SUBF, MULF, DIVF
  • Register move instruction
  • RMO
  • Register-to-register arithmetic operations
  • ADDR, SUBR, MULR, DIVR
  • Supervisor call instruction
  • SVC

29
SIC/XE Machine Architecture (13/13)
  • Input and Output
  • There are I/O channels that can be used to
    perform input and output while the CPU is
    executing other instructions

30
SIC/XE Programming Examples (Fig 1.2b)
31
SIC/XE Programming Example (Fig 1.3b)
32
SIC/XE Programming Example (Fig 1.4b)
33
SIC/XE Programming Example (Fig 1.5b)
34
SIC/XE Programming Example (Fig 1.7b)
35
Homework Assignment 8
  • SIC/XE Simulation
  • All the instructions except FIX, FLOAT, HIO, LPS,
    NORM, SIO, SSK, SVC, and TIO that are shown on
    pages 496-497.
  • The input of the simulator is a sequence of
    SIC/XE machine codes. Read the machine codes
    from a file. In the file, each line contains
    just one byte of machine code. Assume that a
    halt instruction exists and its OP code is FF.
  • The output will be the result that produced by
    the emulator. In addition, you need to print out
    all the contents of registers (A, B, PC, S, T, F,
    ...) for each instruction executed by the
    simulator.

36
Example Input
Input
75 20 08 05 2F FA
Op74 (LDT) i1, p1, disp008
Op04 (LDX) i1, p1, dispFFA
37
Example Output
  • Op74 LDT
  • i1, p1, (or nixbpe010010), disp008
  • TA00B (immediate)
  • Registers
  • A000, B000, S000, T00B, F000000
  • X000, L000, PC003, SW000
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