COMP 252 Operating Systems

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COMP 252Operating Systems

• Review Question week 10

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Review Question 1

• Most systems allow programs to allocate more
  memory to its address space during execution.
• e.g. Data allocated in the heap segments of
  programs is an example of such allocated memory.

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Review Question 1 (Cont.)

• What is required to support dynamic memory
  allocation in the following schemes
• contiguous-memory allocation
• pure segmentation
• pure paging

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Answer

• contiguous-memory allocation
• might require relocation of the entire program
• since there is not enough space for the program
  to grow its allocated memory space.
• pure paging
• incremental allocation of new pages is possible
  in this scheme without requiring relocation of
  the programs address space.

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Answer (Cont.)

• pure segmentation
• might require relocation of the segment that
  needs to be extended
• since there is not enough space for the segment
  to grow its allocated memory space.

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Review Question 2

• Consider the following segment table

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Review Question 2 (Cont.)

• What are the physical addresses for the following
  logical addresses?
• 0,430
• 1,10
• 2,500
• 3,400
• 4,112

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Answer

• 219 430 649
• 2300 10 2310
• illegal reference, trap to operating system
• 1327 400 1727
• illegal reference, trap to operating system

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Review Question 3

• 1) Consider a paging system with the page table
  stored in memory.
• If a memory reference takes 200 nanoseconds, how
  long does a paged memory reference take?

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Review Question 3 (Cont.)

• 2) Assume that finding a page-table entry in the
  associative registers takes zero time, if the
  entry is there.
• If we add associative registers, and 75 percent
  of all page-table references are found in the
  associative registers
• what is the effective memory reference time?

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Answer

• 400 nanoseconds
• 200 nanoseconds to access the page table
• 200 nanoseconds to access the word in memory.
• Effective access time
• 0.75 (200 nanoseconds) 0.25 (400
  nanoseconds) 250 nanoseconds.

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Paging Hardware With TLBtranslation look-aside
buffers

• Can be very large,
• e.g. 1M entries

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Why use TLB

• Implementation of Page Table
• Page table is kept in main memory
• Page-table base register (PTBR) points to the
  page table
• Page-table length register (PRLR) indicates size
  of the page table
• In this scheme every data/instruction access
  requires two memory accesses.
• One for the page table and one for the
  data/instruction.

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Why use TLB (Cont.)

• The two memory access problem can be solved by
  using TLB
• translation look-aside buffer (TLB)
• a special, small, fast-lookup hardware cache
• each entry in the TLB consists of a key (or tag)
  and a value
• page number is presented to the TLB, if found,
  its frame number is immediately available to
  access memory
• fast but expensive

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TLB miss and Hit ratio

• TLB miss If the page number is not in the TLB, a
  memory reference to the page table must be made.
• Hit ratio percentage of times that a page number
  is found in the TLB.
• Assume TLB search takes 20ns memory access takes
  100ns
• TLB hit ? 1 memory access TLB miss ? 2 memory
  accesses

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Effective Access Time (EAT)

• Hit ratio 80
• EAT (20 100) 0.8 (20 200) 0.2 140ns
• Hit ratio 98
• EAT (20 100) 0.98 (20 200) 0.02
  122ns
• More details on textbook p282-284

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Hierarchical Paging

• Modern computer systems support a large logical
  address space, e.g.,
• 32-bit machine with 4K (212) page size
• page table consists of up to 1M (232/212) entries
• may need up to 4MB of physical address space for
  the page table alone. (assume that each entry
  consists of 4B)
• In such an environment, the page table itself
  becomes excessively large.

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Hierarchical Paging (Cont.)

• One solution break up the logical address space
  into multiple page tables
• two-level page table
• the page table is paged, the page number is
  further divided as follows

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Hierarchical Paging (Cont.)

• two-level page table (Cont.)
• p1 is an index into the outer page table
• p2 is the displacement within the page of the
  outer page table

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Hierarchical Paging (Cont.)

• Because address translation works from the outer
  page table inward, this scheme is also known as a
  forward-mapped page table.
• More details on textbook p288-289.