Flash Memory Reliability

1
Flash Memory Reliability
Par-3a
Description
FY08 Plans

This task will evaluate the reliability of two
flash technologies floating gate and NROM. Both
are promising for potential space
applications. The reliability physics of the two
technologies are different and will be further
investigated on memory test structures and/or
memory chips. We will collaborate with TransEL,
Spansion and AMIS to assess the reliability of
the flash memory devices from both flash memory
chip level and its reliability management from
system perspective for space applications.

Review floating gate and NROM flash memory
technologies Obtain memory test structures and/or
memory chips from the two technologies Perform
reliability testing on the test structures and/or
chips Analyze reliability testing results and
write final report
Schedule/Costs
Total Full-Cost
Deliverables

• Final report on
• Reliability characterization of both floating
  gate and NROM flash memory test structures and
  chips
• Flash memory and its management from system
  perspective for space applications

Lead Center/PI JPL/Yuan Chen External Co-Is
Scott Tyson (TransEL), Rich Blish (Spansion),
Lynett Westergard (AMIS)