B. Robert Gregoire

1
Correlated Level Shifting to Reduce the Effects
of Finite Opamp DC Gain and Swing(And Save
Power!)

• B. Robert Gregoire
• Nu-Trek
• Bozeman, MT
• rob.gregoire_at_nu-trek.com

2
Outline

• What is CLS?
• Power issues
• Traditional rail-to-rail
• Reduced swing
• Accuracy
• Finite DC gain
• CLS solution
• 0.18mm pipelined ADC results

3
Correlated Level Shifting

• Two power saving attributes
• True rail-to-rail swing
• Increased SNR
• Equivalent DC gain with ½ the stages
• Increased precision

4
Correlated Level Shifting

• Switched capacitor technique
• Transfers SIGNAL from opamp to a capacitor
• Within feedback loop
• Burden shifted from non-linear opamp to passive
  capacitor

5
Correlated Level Shifting

• True rail-to-rail swing
• Error (1/Ab)2
• Like DC gain (Ab)2

6
So Called Rail-to-Rail Opamps
7
So Called Rail-to-Rail Opamps

• Modern Rail-to-Rail opamps
• Max Swing (without distortion)
• VDD - 150mV, VSS 150mV
• VSWING VDD 300 mV

8
Consequences of Reduced Swing

• Traditional opamp
• VSWING VDD 300mV
• Reduced signal
• VSWING/VDD
• Power increase (VDD/VSWING)2
• SNR
• 200 at VDD 1.0V
• Optimistic
• Distortion

9
CLS Attribute 1

• True rail-to-rail
• Beyond rail!
• P (VDD/VSWING)2

10

• Power Cost of High Opamp DC Gain

11
Open Loop (DC) Gain Effects

• Use feedback for high accuracy
• b is well controlled
• Need Large A
• Error 1/(Ab)

12
Achieving High Gain (Cascade)

• Multi-stage opamp
• Each stage requires power
• Bandwidth and phase margin

13
Achieving High Gain (Cascode)

• Telescopic opamp
• Loss of headroom
• 9x power penalty!
• Parallel opamp power
• Phase margin

14
CLS Attribute 2

• High DC gain with ½ the stages
• Alternative
• Cascade opamp
• 2x stages, each uses power
• Cascode opamp
• 2x stages, lost headroom
• Lost bandwidth

15
Feedback Accuracy

• Increase A?

16
Error From Signal not Opamp

• Increase A?
• Signal is the problem

17
Error From Signal not Opamp

• Increase A?
• Signal is the problem
• Remove it!

18
Error From Signal not Opamp

• Correlated Level Shifting
• Transfer signal to passive cap

19
Error From Signal not Opamp
Small (Low Distortion)
Large (Beyond VDD)
20
CLS Increased Accuracy

• Signal is transferred to passive cap
• OP1 output level shifted towards mid-rail
• OP1 only processes DV
• Error (1/Ab)2
• Like DC gain (Ab)2

21
CLS Increased Accuracy

• Signal is transferred to passive cap
• To and Beyond Rail

22
2-Stage Opamp with CLS

• 30dB Ab opamp
• 60dB performance
• True rail-to-rail
• Power savings

23
CLS To/Beyond Rail
24
Speed CLS or high gain opamp?

• For a given bandwidth, phase margin, and
  effective gain, it is about a tie
• CLS
• Simple op-amp
• Rail-to-rail advantage
• Winner!

Estimate
Level-shift
Settled
25
0.18mm CMOS Test Chip(s)

• Purpose confirm CLS attributes
• 12-bit pipelined A/D converter
• 1.5-bits per stage, 30dB 2-stage amp
• Bootstrapped input switch

26
Testing Over-60dB
VDD 0.9V VREF1.0V Fs20MHz Fin1MHz 6.2mW
(analog)
INL (12-bit LSBs)
27
Testing Over-60dB
VDD 0.9V VREF1.0V Fs20MHz Fin1MHz 6.2mW
(analog)
INL (12-bit LSBs)
28
Testing Rail-to-Rail (Setup)
29
Testing Rail-to-Rail (Nyquist)
VDD 0.9V VREF1.0V Fs20MHz Fin10MHz 6.2mW
(analog)
30
Nyquist Rate Performance
VDD 0.9V VREF1.0V Fs20MHz Fin10MHz 6.2mW
(analog)
31
Testing Rail-to-Rail (FIN1MHz)
VDD 0.9V VREF1.0V Fs20MHz Fin1MHz 6.2mW
(analog)
32
ENOB
VDD 0.9V VREF1.0V Fs20MHz Fin1, 10MHz 6.2mW
(analog)
33
Performance Summary

• 360fJ/conv best 0.18mm pipelined ADC published
• Vdd 0.9V
• Not optimized for power
• Gregoire/Moon, JSSC, Dec. 2008

34
Conclusions

• Power Advantage
• CLS enables high gain with ½ the number of opamp
  stages
• CLS enables true rail-to-rail operation
• CLS has minimal (none?) collateral damage
• No speed penalty (speed increase?)
• No added noise