DEPFET Thinning Technology Experiences and First Results

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DEPFET Thinning Technology- Experiences and
First Results -
L. Andriceka, P.Fischerb, G.Lutza, R.H.Richtera,
M.Schumacherc, M.Trimplc, J.Ulricic, N.Wermesc
aMPI Munich (HLL), bUniversity Mannheim, and
cUniversity Bonn

• Introduction - Module Concept
• Technology
• Overview
• Direct Wafer Bonding
• Deep Etching
• Results with first mechanical Dummies
• Diodes on thin Silicon (first results)
• Summary and Conclusion
• http//www.hll.mpg.de/lca/tesla

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Module Concept
5-layer (CCD-like) layout for the vertex detector
1st layer module sensitive area 100x13
mm2 sensitive area thinned down to 50 mm,
supported by a directly bonded 300 mm thick frame
of silicon
Estimated Material Budget (1st layer) Pixel
area 100x13 mm2, 50 mm 0.05
X0 steer. chips 100x2 mm2, 50 mm
0.008 X0 (massive) Frame 100x4 mm2, 300 mm
0.09 X0

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Processing thin detectors- the Idea -
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Processing thin detectors- Direct Wafer Bonding
-
SOI Wafer prepared by MPI für
Microstrukturphysik, Halle
1 cm/sec
picture from www.mpi-halle.mpg.de
Q.-Y. Tong and U. Gösele Semiconductor Wafer
Bonding John Wiley Sons, Inc.
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Processing thin detectors- anisotropic wet
etching -
Hydroxide etching of silicon KOH, NaOH, ,
TMAH (CH3)4 NOH
54.72 deg
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Processing thin detectors - anisotropic wet
etching -
Tetra-Methyl-Ammonium-Hydroxide
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Processing thin detectors- open
questions/possible problems -
How thin can we get? How good/reliable is wafer
bonding? How good/reliable is etching with
TMAH? Are these custom made "SOI" wafers good
enough for high quality/low noise pixel
sensors? Does the thinning procedure affect the
sensor performance?
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Mechanical Dummies - distortions -
window dimensions (50x13)/4 mm2 6.5x6.5
mm2 80x10.4 mm2 (80 of tesla sensor) (50x13)/2
mm2 50x13 mm2
10 "SOI" wafers with top layer different thickness
24 - 29 micron (3 Wafers) 36 - 38 micron (3
Wafers) 43 - 51 micron (4 Wafers)
Etched with KOH at CiS Erfurt
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Diodes Teststructures on thin Silicon
test bondability of implanted oxide
electrical performance of diodes on thin silicon

2 types of thinned diodes
4 Wafers with standard Diodes as a reference

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Diodes Teststructures on thin Silicon
Type I pn-junction on top wafer surface
white areas will be thinned to 50 µm after
processing
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Diodes Teststructures on thin Silicon- Direct
Wafer bonding after Implantation -
Bonded wafers (structured implant through BOX)
infrared transmission pictures from MPI Halle (M.
Reiche)
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Diodes Teststructures on thin Silicon- Type I
CV curves, full depletion voltage -
handle wafer not yet etched!!!
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Diodes Teststructures on thin Silicon- Type I
IV curves -
handle wafer not yet etched!!!
Reverse currents almost the same for both wafer
types (about 1 nA/cm2) !!!???
Stress in the bond interface???? process
related??? ??? ? more investigations in the
next weeks
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Diodes Teststructures on thin Silicon- Type
II results of the test etching -
partially etched Si rest on SiO2
study octagonal "honeycomb"
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DEPFET Thinning Technology- Summary and
Conclusions -

• A module concept for the 1st layer of the TESLA
  vertex detector was presented.
• The sensitive pixel area thinned down to 50 mm
  and supported by an integrated silicon frame.
• Perforating the frame reduces the contribution to
  the material budget to 0.11 X0 for the first
  layer.
• The feasibility of the thinning technology was
  shown
• 50 mm thickness in the sensitive area is easily
  achievable.
• Direct wafer bonding with implanted and
  structured interface is possible,
• (optimizations concerning the density of voids)
• TMAH (with the appropriate additives) seems to be
  a good choice for the deep etching
• First IV measurements of diodes on thin silicon
  are extremely encouraging reverse current lt 1
  nA/cm2.
• Next steps
• Continue etching next week, more IV/CV
  measurements, dicing of the "chips" and
• more detailed mechanical investigations.