Title: Issues and Trends in Router Design
1Issues and Trends in Router Design
- Presented by
- Lilian Atieno
2Outline
- Introduction
- Components of a Router
- Design Issues
- Backbone Routers
- Enterprise Routers
- Access Routers
- Advances and Trends in Router Design
- Problems in Router Design
- Conclusion
3Introduction
- Router is layer 3 packet forwarder
- Links global internet
- Transfer packets from input to output links
- Issues in router design
- Diverse link technologies
- Scheduling support for differential services
- Wide range of routing protocols and packet
formats e.t.c. - Router classification
- Backbone routers
- Enterprise routers
- Access routers
4Router Components
- Main components
- Input port
- Output port
- Switching fabric
- Routing processor
5Input Port
- Functions
- Point of entry for incoming packets
- Route lookup
- Classify packets into predefined service classes
to guarantee QoS - May need to run data-link layer protocols e.g
Point-to-Point Protocol - Participate in arbitration protocols
6Switching Fabric
- Interconnects input and output ports
- Switch fabric technologies
- Buses
- Crossbars
- Shared memories
7Shared bus switch fabrics
Shared bus
1
3
N
1
2
M
Input ports
Output ports
- Issues
- Speed limited by arbitration overhead and bus
capacitance
8Crossbar Switch Fabric
Inactive connection
controller
Input ports
switching fabric
1
2
Active connection
N
-simultaneous data paths -scheduler turns off/on
crossbars -speed limited by scheduler
1
2
M
Output ports
9Shared Memory Switch Fabric
-Incoming packets stored in memory -Controller
informs o/p port that packet is ready -O/p port
retrieves packet Bottleneck - Speed
limited by memory access time
controller
Input ports
shared memory switching fabric
1
2
N
1
2
M
Output ports
10Output Ports
- Function
- Stores packets before transmission to output link
- Need to support data-link layer encapsulation and
decapsulation
11Routing Processor
- Functions
- Computes forwarding table
- Implement routing protocols
- Run software to configure and manage router
- Handles packets whose destination address are not
in the forwarding table
12Design Issues of Backbone Router
- Backbone routers interconnect enterprise networks
- High link cost shared among large customer base
- Main challenge
- Maintaining high speed
- Reliability
- Techniques of achieving reliability
- Dual Power supplies
- Hot spares
- Duplicate data paths through routers
13High speed routing in Backbone Routers
- Major performance bottleneck
- Route lookup in the forwarding table
- Routing table may contain thousand of entries
- Finding the longest matching prefix
- Small packets increases cost of lookup
- Large number of destinations increases cost
- Output-queued routers
- Switch fabric runs faster than sum speed of
incoming links - Problem
- Limitation on speed of router
- Rate of accessing output buffers limited by SRAM
or DRAM access time
14Performance bottleneck
- Input queued routers
- Problem
- Contention for switching fabric and output queue
- Difficult to design high speed arbiters that will
fairly schedule switch fabric and output lines - Stability and reliability of routing protocol
implementation - Routers running different protocols
- Router misconfigurations may cause routing
oscillations
15Design Issues of Enterprise Routers
- Enterprise/campus routers interconnect end
systems - Main objectives
- Provide connectivity to large number of end
points as cheaply as possible - Provide different service qualities
- Main challenges
- Routers have low cost/port
- Routers have large number of ports
- Easy to configure
- Support QoS
- Carry multicast traffic efficiently
- Support multiple protocols eg. IP, IPX
- Support feature like traffic filters, firewalls,
virtual LANS etc.
16Design Issues of Access Routers
- Acess routers link customers at home or in small
businesses with an ISP - Main objective
- Support heterogeneous high speed ports
- Support variety of protocols at each port
17Advances and Trends in Router Design
- High speed route lookup
- Speed of algorithm determined by
- number of memory accesses
- Speed of memory
- Techniques to improve performance of route lookup
algorithms - Hardware oriented techniques
- Based on CAMs and caches
- Table compaction techniques
- Build compact data structures for the forwarding
table and store in L1 cache - Hash-based solutions
- Use markers on the hash tables
18Cont
- Advances in switching Fabric
- ATM switch fabric cores
- Allows router to support different QoS streams
- Once destination port is determined, IP packet is
fragmented into ATM cells and switched - ATM cells are reassembled at the output port
before transmission - Enterprise-Level mgt and centralization
- Single administrator controlling all routers in
the enterprise - Centralize some router functions
- Central route server computes loop-free routes
for entire enterprise and loads them on all
routers forwarding table
19Cont
- Avoid route lookups
- Backbones can provide virtual circuit interface
(VCI) by carrying IP over ATM over SONET - Require edge networks to translate destination
address to a VCI - Speeding up output queues
- Bottleneck of output queues is access speed of
the buffer - Solutions
- Build very wide memories that can load entire
cell in a single memory cycle - Integrate port controller and the associated
queues on a single chip eg. 77v400 chipset from
IDT Inc - Access entire memory row at a time
20Cont
- Input queued switches
- Problems
- Head-of-line blocking
- Arbitrating access to switch fabric at high speed
- Difficult to implement scheduling algorithm that
simultaneously schedules both fabric and output
queues - Output port connected to different link
technologies eg. FDDI, Fast-Ethernet etc. - Varying speeds and transmission policies
- Solution
- Multiple queues, one per output port
21Cont
- Scheduling
- Fair Queuing
- Each packet source sharing a link is allocated a
a weight at bottleneck link - Protects well-behaved sources from lossing
packets due to misbehavior of other sources - Provide fair bandwidth allocation
- Reducing port cost
- Cost depend on
- Amount and kind of memory used SRAMs vs DRAMs
- Processing power ASICs vs General purpose
processors - Complexity of protocol used for communication
between port and routing processor
22Open Problems in Router Design
- Flow identification
- Need efficient and fast flow classifier
- Ease of configuration
- Configuring routers is hard
- Detecting mistakes in configuration files is
difficult - Misconfigured routers causes performance problems
- Software stability of large systems is difficult
to achieve - Interaction between bugs from different vendors
can lead to persistent network instability
23Conclusion
- While advances in router design have solved some
difficult routing problems, some important issues
still remain unresolved - Trade-off between cost, speed, flexibility and
ease of configuration will still be a challenge
for router design