The First Real Operating System for Reconfigurable Computers

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The First Real Operating System for
Reconfigurable Computers
Advanced Computing Research Centre University of
South Australia
The Development an Operating System for a
Reconfigurable Computer (OS4RC)
Grant Wigley PhD. Student Assoc. Prof. David
Kearney Supervisor University of South
Australia Mawson Lakes SA 5095 Grant.Wigley_at_unis
a.edu.au
Combinational Logic Circuit
SPACE.2 RC
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Overview

• What is a Reconfigurable Computer (RC)?
• Why multitask a RC and why use an operating
  system (OS)?
• Issues in an OS4RC?
• What are the major design stages in creating FPGA
  applications and how must they be modified when
  used in conjunction with an OS.
• Our OS specific.
• Experiments and Results.
• Conclusions and future Work.

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What Is an RC?

• RC Systems are those platforms whose architecture
  can be modified by software to suit the
  application at hand.
• Includes reconfigurable logic, currently
  Field-Programmable Gate Array (FPGA) technology,
  as part of the processing resource.
• Speeds up computations by implementing algorithms
  as circuits, thereby eliminating fetch and decode
  cycles while exploiting parallelism.
• Three types of reconfigurable hardware Logic,
  Embedded control, and Computer based RC.

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Example SPACE.2 System

• PCI Bus based co-processing board
• Alpha UNIX host
• Controlled via device driver
• Array of XC6200 FPGAs

Inter-board network on secondary backplane
Computing surface 8 x XC6200 FPGAs
Clock module
Buffer RAM module
Control logic module
SPACE.2 board
64 bit PCI local bus on host motherboard
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Why Multi-task a RC?

• With the development of the partially
  reconfigurable FPGA, it is now possible to truly
  multi-task a RC. (Load and remove applications
  without interrupting other executing
  applications).
• Multitasking a RC will have the ability to
  concurrently execute more than one dependent or
  independent task thus potentially increasing the
  RC throughput and reducing the average
  application waiting time.

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Why an OS for RC?

• Multitasking an FPGA will require management of
  the FPGA resources.
• Management tasks include access, application
  loading, application scheduling, and garbage
  collection.
• Shift some design reasonability's from the
  designer to the OS, therefore reducing the level
  of difficulty in designing applications.
• For RC to become mainstream then it must have
  appropriate OS support.

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Issues for OS4RC

• Current FPGAs applications are designed offline
  as the resources will be guaranteed to be
  available at run time.
• As the status of the FPGA changes in time, the
  applications will have to be completed at
  run-time, and not statically compiled.
• This requires parts of the design process
  (partitioning, placement and routing) to be
  handled at run-time, by an OS.

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Issues for OS4RC (cont)

• Developing algorithms for partitioning, placement
  and routing to suit OS needs.
• As an OS is a direct overhead, the minimization
  of these tasks run-time is essential.
• Traditionally these tasks have long execution
  times and new or modified algorithms need to be
  developed if they are to execute at run-time.
• Whether to use pre-compiled modules instead of
  working at the CLB level.

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The Design Stages

• Allocation
• Deciding which part of the FPGA is available and
  can accommodate the incoming task

New application requiring six contiguous spaces
FPGA Surface
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Dynamic Partitioning

• Breaking a task graph down into smaller
  components so they are able to fit onto an
  available space on the FPGA surface

Circuit Design
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Placement

• What nodes of the application get mapped to what
  FPGA cells?

3
2
4
1
5
6
3
6
5
1
4
2
Allocated, Partitioned Circuit
FPGA partition
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Routing

• Determining a path between two points to create
  an electrical connection

C
B
A
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Our OS Specifics

• Based on the Client/Server model.
• Uses message passing to communicate.
• Input files are simple task graph
  representations.
• Compiled under gcc, using Linux 2.2.15-5.0 OS
  running on a 433 Mhz Celeron Laptop.

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Allocation Algorithm

• Determines the total area required for the
  application and calculates the optimal circuit
  dimensions (the OS limits it to rectangles).
• Determines if there is available FPGA logic.
• If the circuit is unable to be allocated in its
  current shape it calculates the largest FPGA
  logic area available.

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Dynamic Partitioning

• The algorithm is based on the Temporal
  Partitioning algorithm by Purna.
• Aims to break a netlist into segments that might
  be dynamically reconfigured by a process
  analogous to time-slicing.
• This has been adopted for space slicing.

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The Partitioning Algorithm

• Calculates the As Soon As Possible (ASAP)
  execution levels of each node.
• Uses these levels to allocate the nodes to the
  desired partition until the partition reaches the
  user selected capacity.
• Invokes the placement algorithm and if the
  placement fails, the OS reduces the user selected
  capacity and attempts to re-partition and
  re-place the application.
• Once the placement has succeeded the OS attempted
  to route the application.

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Modifications to the Algorithm

• Interfaced to a deterministic placement
  algorithm.
• Interaction between the partitioner and the
  placer.
• Control variable to allow the user to select the
  level of interaction (target fragmentation).
• Selectable partition size.

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Placement Algorithm

• Constructive Deterministic placement.
• Places the first node to the right of the parent.
• Places the second node on top of the parent.
• Adopted from The Trianus System by Gehring.

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Routing Algorithm

• Simple rule-based router.
• Route all nearest-neighbor connections first.
• Route all non nearest-neighbor connections
  (according to a set of rules).
• Saves details of the routes for easy removal.
• Doesnt route inter-partition, only within the
  one partition.

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Experiments

• Two factors that have been investigated are
• The effect of the size of the application.
• The degree of partition fragmentation.
• Generated by applications not being tightly
  packed onto the FPGA surface
• Fragmentation is a measure of resource usage.

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Characteristic Dimension

• Used to measure the usefulness of particular
  partitioned area.
• Ratio of the shortest and the longest dimension
  of the allocated area multiplied by the area.
• Basic measurement of usefulness as it considers
  both size and dimension.
• Larger characteristic dimension is a more useful
  allocation of area.

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Results
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Conclusions

• Fundamental services that must be provided by an
  OS are allocation, partitioning, placement and
  routing.
• Willing to trade the lose in performance for an
  increase in ease of use.
• Results have been positive and shown that an
  OS4RC is possible.
• For FPGAs to become mainstream an appropriate OS
  must be developed.

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Future work

• Possible developed for use with real circuit
  formats (XNF, Netlist) as circuits are currently
  just represented as task graphs.
• The creation of a benchmark suite for OS4RC.
• Development of applications that would utilize an
  OS4RC.
• Integration to a current OS such as Linux.

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Questions
The First Real Operating System for
Reconfigurable Computers
The Development an Operating System for a
Reconfigurable Computer (OS4RC)
Grant Wigley - PhD. Student Assoc. Prof. David
Kearney - Supervisor University of South
Australia Mawson Lakes SA 5095 Grant.Wigley_at_unis
a.edu.au David.Kearney_at_unisa.edu.au